A layered emulator for design evaluation of MIMD multiprocessors with shared memory

  • Per Stenström
  • Lars Philipson
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 258)


In the design and evaluation of new multiprocessor structures it is necessary to make experiments to explore the consequences of various decisions, e.g. the dynamic interaction between hardware, system software and executing parallel programs. When the target architecture is based on VLSI implementation, it is especially necessary to make the experiments prior to implementation.

An experimental system has been designed that can emulate a wide range of MIMD multiprocessor structures by implementing parts of the hardware functions by software. It consists of several layers of interacting hardware and software. The hardware for emulating the basic processing element contains two 32-bit processors, a floating point processor, 512 Kb RAM, local I/O and a special-purpose bus interface to support a set of communication primitives. A large number of such elements can be interconnected by a global bus.

Ada is one of the languages used for parallel application programs (Ada is a registered trademark of the US Government, AJPO).


Global Memory Memory Reference Virtual Memory VLSI Implementation Page Fault 
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Copyright information

© Springer-Verlag Berlin Heidelberg 1987

Authors and Affiliations

  • Per Stenström
    • 1
  • Lars Philipson
    • 1
  1. 1.Department of Computer EngineeringUniversity of LundLundSweden

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