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Transputer-based experiments with the ZAPP architecture

  • D. L. McBurney
  • M. R. Sleep
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 258)

Abstract

We report experiments with a parallel architecture called ZAPP[2] simulated on several connected INMOS transputers. Besides the usual synthetic benchmarks (eg Nfib), our experiments covered a range of applications including matrix multiply, heuristic search and the 0–1 knapsack optimisation problem. Some of these applications cannot be adequately supported by the original ZAPP model. We report the modifications we made to ZAPP to accommodate them.

One experiment involved 40 transputers; we obtained a stopwatch speed of over one million function calls per second, corresponding to a relative speedup over a single simulated ZAPP element of 39.9, and a real performance improvement over a single transputer running the same algorithm directly programmed in OCCAM of more than 15. A similar experiment for matrix multiply confirmed that real improvements were obtained using ZAPP techniques.

Experiments with less structured problems, such as heuristic search and the 0–1 knapsack problem, revealed that the longer a problem took to solve using sequential implementation, the more likely it was to benefit from parallel solution using ZAPP techniques.

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References

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Copyright information

© Springer-Verlag Berlin Heidelberg 1987

Authors and Affiliations

  • D. L. McBurney
    • 1
  • M. R. Sleep
    • 1
  1. 1.Declarative Systems ProjectUniversity of East AngliaNorwichEngland

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