An implemented method for incremental systolic design

  • Chua-Huang Huang
  • Christian Lengauer
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 258)


We present a mathematically rigorous and, at the same time, convenient method for systolic design and derive alternative systolic designs for one expository matrix computation problem: matrix multiplication. Each design is synthesized from a simple program and a proposed layout of processors. The synthesis derives (1) a systolic parallel execution, (2) channel connections for the proposed processor layout, and (3) an arrangement of data streams such that the systolic execution can begin. Our choices of alternative designs are governed by formal theorems. The synthesis method is implementable and is particularly effective if implemented with graphics capability. Our implementation on the Symbolics 3600 displays the resulting designs and simulated executions graphically on the screen. The method has also been successfully applied to other matrix computation problems.


Matrix Multiplication Semantic Relation Parallel Execution Systolic Array Product Step 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1987

Authors and Affiliations

  • Chua-Huang Huang
    • 1
  • Christian Lengauer
    • 1
  1. 1.Department of Computer SciencesThe University of Texas at AustinAustinUSA

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