A high performance interconnection concept for dataflow- or other closely coupled multiprocessors

  • R. E. Buehrer
Architectural Aspects (Session 3.1)
Part of the Lecture Notes in Computer Science book series (LNCS, volume 237)


The interconnection network is a crucial part in many existing or proposed multiprocessor systems. Generalized cube- or crossbar-type networks featuring packet-switching [Sieg85] are often proposed if the bandwith demand exceeds the limited capacity of common-bus solutions.

The paper outlines an upgraded version of the intercommunication memory Intercom being successfully implemented in the ETH- Multiprocessor Empress [Bueh82]. This n-way multiport memory type concept is well suited to realize a high bandwith packet-switched network at reasonable cost despite the fact that its complexity is of the order n * n (n equals the number of connected processors) rather than n * log n as in a generalized cube network. Key properties are particularily congestion- (i.e. collision) elimination and minimal network latency. The Intercom technique avoids, therefore, the potential network bottleneck in many multiprocessor concepts as long as the number of connected processors is not exceeding an upper limit.


Data Packet Interconnection Network Multiprocessor System Memory Block Target Processor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • R. E. Buehrer
    • 1
  1. 1.Institut fuer Elektronik, ETH-ZentrumZurichSwitzerland

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