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Efficient parallel evaluation of straight-line code and arithmetic circuits

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VLSI Algorithms and Architectures (AWOC 1986)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 227))

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Abstract

A new parallel algorithm is given to evaluate a straight line program. The algorithm evaluates a program over a commutative semi-ring R of degree d and size n in time O(log n(log nd)) using M(n) processors, where M(n) is the number of processors required for multiplying n×n matrices over the semi-ring R in O (log n) time.

Research supported in part by National Science Foundation Grant MCS-800756 A01.

Research supported by NSF under ECS-8404866, the Semiconductor Research Corporation under RSCH 84-06-049-6, and by an IBM Faculty Development Award.

Research Supported in part by NSF Grant DCR-8504391 and by an IBM Faculty Development Award

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Filia Makedon Kurt Mehlhorn T. Papatheodorou P. Spirakis

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© 1986 Springer-Verlag Berlin Heidelberg

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Miller, G.L., Ramachandran, V., Kaltofen, E. (1986). Efficient parallel evaluation of straight-line code and arithmetic circuits. In: Makedon, F., Mehlhorn, K., Papatheodorou, T., Spirakis, P. (eds) VLSI Algorithms and Architectures. AWOC 1986. Lecture Notes in Computer Science, vol 227. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16766-8_21

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  • DOI: https://doi.org/10.1007/3-540-16766-8_21

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16766-2

  • Online ISBN: 978-3-540-38746-6

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