Advertisement

Linear and book embeddings of graphs

  • Mihalis Yannakakis
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 227)

Keywords

Planar Graph Edge Incident Outer Face Outerplanar Graph Back Edge 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [BK]
    F. Bernhart and B. Kainen, "The book thickness of a graph", J. Combinatorial Theory B, 27, 320–331, (1979).Google Scholar
  2. [BS]
    J. F. Buss, and P. W. Shor, "On the pagenumber of planar graphs", Proc. 16th Ann. ACM Symp. on Theory of Computing, 98–100, (1984).Google Scholar
  3. [CLR1]
    F. R. K. Chung, F. T. Leighton, and A. L. Rosenberg, "Diogenes: a methodology for designing fault-tolerant VLSI processor arrays", 13th Int'l Conf. on Fault-tolerant Computing, 26–32, (1983).Google Scholar
  4. [CLR2]
    F. R. K. Chung, F. T. Leighton, and A.L. Rosenberg, "A graph layout problem with applications to VLSI design", (1984).Google Scholar
  5. [CMSTzzz]
    M. Chung, F. Makedon, I. H. Sudborough, J. Turner, "Polynomial time algorithms for the min cut problem on degree restricted trees". Proc. 23rd Annual Symp. on Foundations of Computer Science, 262–271, (1982).Google Scholar
  6. [DT]
    D. Dolev and H. Trickey, "Embedding a tree on a line", IBM Technical Report, RJ3368, (1982).Google Scholar
  7. [EI]
    S. Even, and A. Itai, "Queues, stacks and graphs", in Theory of Machines and Computations, Z. Kohavi and A. Paz, eds., Academic Press, NY, 71–86, (1971).Google Scholar
  8. [F]
    A. Feller, "Automatic layout of low-cost quick turnaround random-logic custom LSI devices", Proc. 13th Annual Design Automation Conference, 79–85, (1976).Google Scholar
  9. [FK]
    M. J. Foster and H. T. Kung, "Recognizing regular languages with programmable building blocks", in VLSI-81, ed. J. P. Gray, Academic Press, 75–84, 1981.Google Scholar
  10. [GA]
    R.A. Games, "Optimal book embeddings of the FFT, Benes, and barrel shifter networks", Third SIAM Conf. on Discrete Math., (1986).Google Scholar
  11. [Ga]
    F. Gavril, "Some NP-complete problems on graphs", Proc. 11th Conf. on Information Sciences and Systems, John Hopkins University, 91–95, (1977).Google Scholar
  12. [GJMP]
    M. R. Garey, D. S. Johnson, G. L. Miller, and C. H. Papadimitriou, "The complexity of coloring circular arcs and chords", SIAM J. on Alg. and Disc. Meth., 1, 216–227, (1980).Google Scholar
  13. [GO]
    M. C. Golumbic, Algorithmic graph theory and perfect graphs, Academic Press, 1980.Google Scholar
  14. [H1]
    L. Heath, "Embedding planar graphs in seven pages", Proc. 25th Ann. Symp. on Foundations of Computer Science, 74–83, (1984).Google Scholar
  15. [H2]
    L. Heath, "Algorithms for embedding graphs in books", Third SIAM Conf. on Discrete Math., (1986).Google Scholar
  16. [I]
    S. Istrail, "An algorithm for embedding planar graphs in six pages", private communication, (1985).Google Scholar
  17. [L]
    T. Lengauer, "Upper and lower bounds on the complexity of the min-cut linear arrangement problem on trees", SIAM J. Alg. Disc. Meth., (1982).Google Scholar
  18. [MS]
    F. Makedon, I. H. Sudborough, "Minimizing width in linear layouts", Proc. 10th Intl. Coll. on Automata, Languages and Programming, 478–490, (1983).Google Scholar
  19. [MPS]
    F. Makedon, C. H. Papadimitriou, I. H. Sudborough, "Topological bandwidth", SIAM J. Alg. Disc. Meth., (1985).Google Scholar
  20. [PDS]
    G. Persky, D. Deutsch, D. Schweikert, "LTX-A minicomputer-based system for automated LSI layout", J. Design Automation and Fault Tolerant Computing,1, 217–255, (1977).Google Scholar
  21. [R]
    A. L. Rosenberg, "The Diogenes Approach to testable fault-tolerant arrays of processors", IEEE Trans. on Computing, C-32, 902–910, (1983).Google Scholar
  22. [RT]
    P. Rosenstiehl, R. E. Tarjan, "Gauss codes, planar Hamiltonian graphs, and stack-sortable permutations", (1982).Google Scholar
  23. [T]
    R. E. Tarjan, "Sorting using networks of queues and stacks", J. Assoc. Comp. Mach., 19, 341–346, (1972).Google Scholar
  24. [W]
    A. Weinberger, "Large scale integration of MOS complex logic", IEEE J. Solid State Circuits, 182–190, (1967).Google Scholar
  25. [Wi]
    A. Wigderson, "The complexity of the Hamiltonian circuit problem for planar graphs", Princeton Univ. Tech. Report.Google Scholar
  26. [Y1]
    M. Yannakakis, "A polynomial algorithm for the min-cut linear arrangement of trees", J. ACM, 950–988, (1985).Google Scholar
  27. [Y2]
    M. Yannakakis, "Four pages are necessary and sufficient for planar graphs", Proc. 18th ACM Symp. on Theory of Computing, (1986).Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • Mihalis Yannakakis
    • 1
  1. 1.AT&T Bell LaboratoriesMurray Hill

Personalised recommendations