Vlsi algorithms and pipelined architectures for solving structured linear system

  • I-Chang Jou
  • Yu-Hen Hu
  • T. M. Parng
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 227)


In this paper, effective algorithms and pipelined VLSI architectures are developed for the Cholesky factorization of a class of structured linear system equations. This method will be most effective for matrices which have low displacement ranks [1]. Our method is an efficient implementation of the generalized Schur algorithm [2]. Specifically, we prove that the generalized Schur rotation matrix can be decomposed into a sequence of elementary rotations and hence admits a simple and regular VLSI implementation using a linear array of doubly pipelined Cordic processors [3]. With a linear array of O(N) Cordic processors, it is able to solve a N-th order structured linear system with O[(α -1)N] time units.


Cholesky Factorization Covariance System Pipeline Architecture Elementary Rotation Toeplitz System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • I-Chang Jou
    • 1
    • 2
  • Yu-Hen Hu
    • 3
  • T. M. Parng
    • 2
  1. 1.Telecom. Labs., M.O.C.Taiwan, R.O.C.
  2. 2.Elec. Eng. Dept.National Taiwan Univ.Taiwan, R.O.C.
  3. 3.Elec. Eng. Dept. Southern Methodist Uni.Dallas

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