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Hardware simulator of Reduction-Based Parallel Inference Machine PIM-R

  • M. Sugie
  • M. Yoneyama
  • T. Sakabe
  • M. Iwasaki
  • S. Yoshizumi
  • M. Aso
  • H. Shimizu
  • R. Onai
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 221)

Abstract

A hardware simulator of PIM-R (Reduction-Based Parallel Inference Machine) has been developed. Eight MC68000 single board computers and shared storage operate as the inference modules and the network, respectively. In order to realize high simulation rate, an event-driven method is introduced. ”Queens” program and ”Quicksort” program were executed on the simulator. The results show that a PIM-R architecture can effectivity utilize the parallelism in Prolog/Concurrent Prolog programs.

Keywords

Prolog Program Processor Element Inference Module Information Processing Society Prolog System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

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Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • M. Sugie
    • 1
  • M. Yoneyama
    • 1
  • T. Sakabe
    • 1
  • M. Iwasaki
    • 1
  • S. Yoshizumi
    • 1
  • M. Aso
    • 2
  • H. Shimizu
    • 2
  • R. Onai
    • 2
  1. 1.Central Research LaboratoryHitachi, Ltd.Kokubunji, TokyoJapan
  2. 2.ICOTTokyoJapan

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