Skip to main content

VLSI systems for matrix multiplication

  • Conference paper
  • First Online:
Foundations of Software Technology and Theoretical Computer Science (FSTTCS 1985)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 206))

  • 180 Accesses

Abstract

We examine several VLSI architectures and compare these for their suitability for various forms of the matrix multiplication problem. The following architectures are considered: chain, broadcast chain, mesh, broadcast mesh and hexagonally connected. The forms of the matrix multiplication problem that are considered are: matrix × vector, band matrix × vector, matrix × matrix and band matrix × band matrix.

This research was supported in part by the National Science Foundation under grant MCS-83-05567. Professor Kam Hoi Cheng is presently with the Computer Science Department, University of Houston, Houston, TX.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

7. References

  1. L. Cannon, A cellular computer to implement the Kalman filter algorithm, PhD Thesis, Montana State University, 1969.

    Google Scholar 

  2. K. Cheng and S. Sahni, VLSI architectures for matrix multiplication, University of Minnesota, Technical Report, 1984.

    Google Scholar 

  3. E. Dekel, D. Nassimi and S. Sahni, Parallel matrix and graph algorithms, SICOMP 1981, 10, 4, pp. 657–675.

    Google Scholar 

  4. M. Flynn and R. Kosaraju, Processes and their interactions, Kybernetics, 5, 1976, pp. 159–163.

    Google Scholar 

  5. E. Horowitz, VLSI architectures for matrix computations, IEEE International Conference On Parallel Processing, 1979, pp. 124–127.

    Google Scholar 

  6. K.H. Huang and J.A. Abraham, Efficient parallel algorithms for processor arrays, IEEE International Conference On Parallel Processing, 1982, pp. 271–279.

    Google Scholar 

  7. L. Johnsson and D. Cohen, A mathematical approach to modeling the flow of data and control in computational networks, in VLSI Systems and Computations, Kung et al. editors, Computer Science Press, 1981, pp. 213–225.

    Google Scholar 

  8. L. Johnsson, D. Cohen, U. Weiser and A. Davis, Towards a formal treatment of VLSI arrays, CALTECH Conference on VLSI, 1981, pp. 375–398.

    Google Scholar 

  9. H.T. Kung and C.E. Leiserson, Systolic arrays for VLSI, Department of Computer Science, Carnegie-Mellon University, April 1978.

    Google Scholar 

  10. H.T. Kung, Let's design algorithms for VLSI systems, Proceedings CALTECH Conference on VLSI, Jan. 1979, pp. 65–90.

    Google Scholar 

  11. H.T. Kung, A Listing of Systolic Papers, Department of Computer Science, Carnegie-Mellon University, May 1984.

    Google Scholar 

  12. H.T. Kung and W.T. Lin, An algebra for VLSI algorithm design, Carnegie-Mellon University, Technical report, April 1983.

    Google Scholar 

  13. H.T. Kung, A. Nowatzyk, M. Ravisharkar, The Universal Host: Architectures and System configuration, Carnegie-Mellon University, Technical report, October 1983.

    Google Scholar 

  14. C.E. Leiserson, Area-Efficient VLSI Computation, MIT Press, 1983.

    Google Scholar 

  15. R. Melhem and W. Rheinboldt, A mathematical model for the verification of systolic networks, SIAM J. Comput., 1984, 13, 3, pp. 541–565.

    Article  Google Scholar 

  16. R.W. Priester, H.J. Whitehouse, K. Bromley and J.B. Clary, Signal Processing With Systolic Arrays, IEEE International Conference on Parallel Processing, 1981, pp. 207–215.

    Google Scholar 

  17. F. Van Scoy, Parallel algorithms in cellular spaces, PhD thesis, University of Virginia, 1976.

    Google Scholar 

  18. U. Weiser and Al Davis, A Wavefront notation tool for VLSI array design, in VLSI Systems and Computations, Kung et al. editors, Computer Science Press, 1981, pp. 226–234.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

S. N. Maheshwari

Rights and permissions

Reprints and permissions

Copyright information

© 1985 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Cheng, K.H., Sahni, S. (1985). VLSI systems for matrix multiplication. In: Maheshwari, S.N. (eds) Foundations of Software Technology and Theoretical Computer Science. FSTTCS 1985. Lecture Notes in Computer Science, vol 206. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16042-6_25

Download citation

  • DOI: https://doi.org/10.1007/3-540-16042-6_25

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16042-7

  • Online ISBN: 978-3-540-39722-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics