\(v\mathcal{F}\mathcal{P}\): An environment for the multi-level specification, analysis, and synthesis of hardware algorithms

  • Dorab Patel
  • Martine Schlag
  • Miloš Ercegovac
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 201)


This paper describes a method based on applicative languages for the specification, evaluation and synthesis of hardware algorithms. The goal of the research effort is to provide designers with an environment in which they can rapidly explore alternative designs for their algorithms throughout the synthesis process. It is possible to specify the algorithm at arbitrary levels of abstraction and have the system rapidly evaluate certain parameters (e.g. speed, area, etc.) so that designers can make informed decisions during the synthesis process. Layouts which are suitable as floor plans are extracted from high-level algorithms.


Floor Plan Symbolic Input Sequential Circuit Combinational Circuit Outer Function 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [Backus78]
    John Backus, “Can programming be liberated from the von Neumann style? A functional style and its algebra of programs,” Communications of the ACM 21(8), pp. 613–641 (August 1978). 1977 ACM Turing award lecture.Google Scholar
  2. [Backus81]
    John Backus, “The Algebra of Functional Programs: Function level Reasoning, Linear Equations, and Extended Definitions,” Proceedings International Colloqium on Formalization of Programming Concepts Lecture Notes in Computer Science #107, pp. 1–43, Springer Verlag (1981).Google Scholar
  3. [Brent80]
    R. P. Brent and H. T. Kung, “The Chip Complexity of Binary Arithmetic,” Proceedings 12th ACM Symposium on the Theory of Computing, pp. 190–200 (May 1980).Google Scholar
  4. [Cardelli81]
    Luca Cardelli and Gordon Plotkin, “An Algebraic Approach to VLSI Design,” pp. 173–192 in VLSI 81 — Very Large Scale Integration First International Conference on VLSI, ed. John P. Gray (1981).Google Scholar
  5. [Director81]
    S. Director, A. Parker, D. Siewiorek, and D. Thomas, “A Design Methodology and Computer Aids for Digital VLSI Systems,” IEEE Transactions Circuits and Systems CAS-28(7), pp. 634–645 (July 1981).Google Scholar
  6. [Johannsen79]
    David Johannsen, “Bristle Blocks: A Silicon Compiler,” Proceedings 16th Design Automation Conference, pp. 310–313 (June 1979).Google Scholar
  7. [Johnson84]
    Steven Johnson, Synthesis of Digital Designs from Recursion Equations, MIT Press (1984).Google Scholar
  8. [Lahti81]
    D. O. Lahti, “Applications of a Functional Programming Language,” Tech. Rep. CSD-810403, UCLA Computer Science Department, Los Angeles, California, (April 1981).Google Scholar
  9. [Meshkinpour85]
    F. Meshkinpour and M. D. Ercegovac, “A Functional Language for Description and Design of Digital Systems: Sequential Constructs,” Proceedings of the 22nd Design Automation Conference, pp. 238–244 (June 23–26, 1985).Google Scholar
  10. [Ousterhout81]
    John Ousterhout, “Caesar: An Interactive Editor for VLSI Layouts,” VLSI Design II(4), pp. 34–38 (fourth quarter 1981).Google Scholar
  11. [Ousterhout84]
    J. K. Ousterhout, G. T. Hamachi, R. N. Mayo, W. S. Scott, and G. S. Taylor, “Magic: A VLSI Layout System,” Proceedings of the 21st Design Automation Conference, pp. 152–159 (June 25–27, 1984).Google Scholar
  12. [Rivest82]
    Ronald L. Rivest, “The ‘PI’ (Placement and Interconnect) System,” Proceedings of the 19th Design Automation Conference, pp. 475–481 (June 1982).Google Scholar
  13. [Schlag84]
    Martine Schlag, “Extracting Geometry from FP for VLSI Layout,” Tech. Rep. CSD-840043, UCLA Computer Science Department, Los Angeles, California, (October 1984).Google Scholar
  14. [Sheeran84]
    Mary Sheeran, “muFP, a language for VLSI design,” Proceedings of the 1984 ACM Conference on Lisp and Functional Programming, pp. 104–112 (August 6–8, 1984).Google Scholar
  15. [Siskind82]
    Jeffrey Mark Siskind, Jay Roger Southard, and Kenneth Walter Crouch, “Generating Custom High Performance VLSI Designs from Succinct Algorithmic Descriptions,” 1982 MIT Conference on Advanced Research in VLSI, pp. 28–40 (January 1982).Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1985

Authors and Affiliations

  • Dorab Patel
    • 1
  • Martine Schlag
    • 1
  • Miloš Ercegovac
    • 1
  1. 1.Computer Science DepartmentUniversity of California, Los AngelesLos AngelesUSA

Personalised recommendations