Cobweb — A combinator reduction architecture

  • CL Hankin
  • PE Osmon
  • MJ Shute
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 201)


The work reported in this paper represents the convergence of ideas stemming from two areas of research. In the hardware field there has been significant interest in developing the techniques of Wafer Scale Integration to provide large assemblies of tightly-coupled simple processors that can act cooperatively in the execution of a task. In the software field there has been a growing awareness that declarative languages lead to higher programmer productivity and offer more potential for parallel evaluation than the traditional, imperative languages.

This paper describes the first machine in a family called COBWEB. The common denominator of the family is that all of the machines are targetted to supporting functional languages and all execute some form of combinator code. The first machine employs normal order reduction to evaluate pure functional programs. The next machine will use a parallel reduction strategy and later members will support progressively more sophisticated facilities. All of the machine are intended to exploit the potential of Wafer Scale Integration.


Output Buffer Abstract Machine Functional Language Parallel Evaluation Garbage Collector 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1985

Authors and Affiliations

  • CL Hankin
    • 1
  • PE Osmon
    • 2
  • MJ Shute
    • 3
  1. 1.Dept of Computing Imperial CollegeLondon UniversityLondon
  2. 2.Dept of Computing Kings CollegeLondon UniversityLONDON
  3. 3.Microelectronics CentreMiddlesex PolytechnicLONDON

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