Axioms for memory access in asynchronous hardware systems

  • J. Misra
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 197)


The problem of concurrent accesses to memory registers by asynchronous components is considered. A set of axioms about the values in a register during concurrent accesses is proposed. It is shown that if these axioms are met by a register then concurrent accesses to it may be viewed as nonconcurrent, thus making it possible to analyze asynchronous algorithms without elaborate timing analysis of operations. These axioms are shown, in a certain sense, to be the weakest. Motivation for this work came from analyzing low level hardware components in a VLSI chip which concurrently access a flip-flop.


Partial Order Total Order Hardware Design Read Operation Memory Register 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag 1985

Authors and Affiliations

  • J. Misra
    • 1
  1. 1.Department of Computer ScienceThe University of Texas at AustinAustin

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