The power of a one-dimensional vector of processors

  • Jon Louis Bentley
  • Thomas Ottmann
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 100)


Kung [1979b] has recently enunciated a set of principles for designing algorithms for implementation in Very Large Scale Integrated circuitry (VLSI), and supported these principles by displaying a number of particular algorithms based on various "communication geometries". In this paper we will examine a communication geometry which Kung calls the "one-dimensional array of processors", and which we call a "processor vector" or "PV". We will see that this simple structure can efficiently solve the rather difficult problems of multiplying matrices and of constructing minimum spanning trees.


Minimum Span Tree Host Computer Very Large Scale Integrate Minimum Span Tree Problem Output Array 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. Bentley, J. L. [1980]. "A parallel algorithm for constructing minimum spanning trees," to appear in the Journal of Algorithms.Google Scholar
  2. Cheriton, D. and R. E. Tarjan [1976]. "Finding minimum spanning trees," SIAM J. Computing 5, 4, December 1976, pp. 724–742.Google Scholar
  3. Goodman, S. E. and S. T. Hedetniemi [1977]. Introduction to the Design and Analysis of Algorithms, McGraw-Hill.Google Scholar
  4. Horowitz, E. [1979]. "VLSI architecture for matrix computations," Proceedings of the 1979 International Conference on Parallel Processing, pp. 124–127, August 1979, IEEE.Google Scholar
  5. Kung, H. T. [1979a]. "The structure of parallel algorithms," to appear in Advances in Computers.Google Scholar
  6. Kung, H. T. [1979b]. "Let's design algorithms for VLSI systems", Caltech Conference on VLSI: Architecture, Design and Fabrication, January 1979.Google Scholar
  7. Kung, H. T. and C. E. Leiserson [1980], "Systolic arrays (for VLSI)," in Mead and Conway [1980], Section 8.3.Google Scholar
  8. Mead, C. A. and L. A. Conway [1980]. Introduction to VLSI Systems, Addison-Wesley, Reading Mass.Google Scholar
  9. Preparata, F. P. and J. Vuillemin [1979]. "Cube-connected-cycles: A versatile network for parallel computation," Twentieth Symposium on the Foundations of Computer Science, IEEE, October 1979, pp. 140–147.Google Scholar
  10. Savage, C. D. [1977]. "Parallel algorithms for graph theoretic problems," University of Illinois Coordinated Science Laboratory Report UILU-ENG-77-2231.Google Scholar
  11. Sollin [1977]. An algorithm attributed to Sollin in Goodman and Hedetniemi [1977], Section 5.5. (Also referred to in Yao [1977].)Google Scholar
  12. Thompson, C. D. [1979]. "Area-time complexity for VLSI," Eleventh ACM Symposium on the Theory of Computing, ACM, May 1979.Google Scholar
  13. Yao, A. C. [1977]. "On constructing minimum spanning trees in k-dimensional space and related problems," Stanford Computer Science Department Report STAN-CS-77-642 (December 1977).Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1981

Authors and Affiliations

  • Jon Louis Bentley
    • 1
  • Thomas Ottmann
    • 2
  1. 1.Departments of Computer Science and MathematicsCarnegie-Mellon UniversityPittsburgh
  2. 2.Institut fuer Angewandte Informatik und Formale BeschreibungsverfahrenUniversity of Karlsruhe75 KarlsruheWest Germany

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