Computer organization and architecture
The instruction set is a defining influence on the machine organization that interprets it. A well mapped machine is one whose organization directly supports a single instruction set and whose state transition matches those called for by the instruction.
An important determinant in the architecture is the mechanism for naming and locating an object in the storage hierarchy. Three classes of issues are involved in name specification; the process name space which deals with issues unique to a single program, the processor name space which is concerned with interprocess communication issues and finally a memory space which is concerned with the physical parameters of access time and bandwidth.
A Canonic Interpretive Form (CIF) of higher level languages programs is proposed to measure the "minimum" space to represent and time to interpret a given program. This "ideal" is a basis for a comparison with traditional machine languages which require ten times more program space than the CIF.
Synthesis of program forms (called Directly Executed Languages—DELs) which approach CIF measures is proposed as well as results of a recently completed FORTRAN DEL (DELTRAN).
Within the context of traditional machine architectures, concurrency or parallel arrangement of processors is possible to improve performance. Two classes of organizations are discussed: the single instruction multiple data stream type and the multiple instruction multiple data stream. These organizations, together with a performance analysis based on certain program behavior characteristics, is reviewed.
KeywordsMemory Space Data Path Program Representation Action Rule High Level Language
Unable to display preview. Download preview PDF.
- Flynn, M. J., "Microprogramming: Another Look at Internal Computer Control", Proc. of IEEE, Vol. 63, No. 11, November 1975.Google Scholar
- Flynn, M. J., "Microprogramming and the Control of a Computer", Chapter 10, Introduction to Computer Architecture, H. Stone (Ed.) Science Research Assoc. (Pub.), 1975, pp. 432–473.Google Scholar
- Coffman, E. G. and Denning, P. J., Operating Systems Theory, Prentice Hall, 1973.Google Scholar
- Dennis, J., "Segmentation and the Design of Multiprogrammed Computer Systems", JACM, Vol. 12, No. 4, October 1965.Google Scholar
- Randall, B., and Kuehner, C. J., "Dynamic Storage Allocation Systems", CACM, Vol. 11, No. 5, pp. 297–305, May 1968.Google Scholar
- Habermann, A. N., Introduction to Operating Systems Design, SRA (Pub.) 1976.Google Scholar
- Denning, P., "The Working Set Model for Program Behavior", CACM, Vol. 11, No. 5, pp. 323–333, May 1968.Google Scholar
- Denning, P. and Graham, G. S., "Multiprogrammed Memory Management", Proc. of the IEEE, Vol. 63, No. 6, pp 924–939, June 1975.Google Scholar
- Fuller, S., "Performance Evaluation" Chapter 11 in Introduction to Computer Architecture, H. Stone (Ed.), SRA (Pub.), 1975.Google Scholar
- Kleinrock, L., Queueing Systems, 2 Volumes, Wiley-Interscience Publ., 1975.Google Scholar
- Flynn, M. J., "The Interpretive Interface: Resources and Program Representation in Computer Organization", Proc. of the Symposium on High Speed Computers and Algorithms, April 1977, University of Illinois, Academic Press (Pub.).Google Scholar
- Hammerstrom, D. W. and Davidson, E. S., "Information Content of CPU Memory Referencing Behavior", Proc. of Fourth Symposium on Computer Architecture, March 1977.Google Scholar
- Flynn, M. J., "Trends and Problems in Computer Organizations", IFIP Proceedings 74, North-Holland Pub., pp. 3–10.Google Scholar
- Lunde, A., "More Data on the O/W Ratios", Computer Architecture News, Vol. 4, No. 1, pp. 9–13, March 1975, Pub. ACM.Google Scholar
- Freeman, Martin, et al, "PERSEUS: An Operating System Machine," unpublished manuscript, December 1977.Google Scholar
- Rossman, G., Flynn, M., McClure, R., and Wheeler, N. D., "The Technical Significance of User Microprogrammable Systems", Technical Report, Palyn Associates, San Jose, CA., for U. S. National Bureau of Standards Contract, No. 4-36045, November 1974.Google Scholar
- Flynn, M. J., Neuhauser, C. J. and McClure, R. M., "EMMY—An Emulation System for User Microprogramming", AFIPS, Vol. 44, NCC, 1975, pp. 85–89.Google Scholar
- Flynn, M. J., Hoevel, L. W., and Neuhauser, C. J., "The Stanford Emulation Laboratory", Digital Systems Lab., Technical Report No. 118, Stanford University, June 1976.Google Scholar
- Burroughs Corp., "B-1700 Systems Reference Manual", Burroughs Corp., Detroit, Mich., 1972.Google Scholar
- Hoevel, L. W. and Flynn, M. J., "The Structure of Directly Executed Languages: A New Theory of Interpretive System Support", Digital Systems Lab., Technical Report No. 130, Stanford University, March 1977.Google Scholar
- Johnson, J. B., "The Contour Model of Block Structured Processes", SIGPLAN Notices, Vol. 6, pp. 52–82, February 1971.Google Scholar
- Hoevel, L. W., "DELtran Principles of Operation", Digital Systems Lab., Technical Note No. 108, Stanford University, March 1977.Google Scholar
- Wilner, W., "Burroughs B-1700 Memory Utilization", AFIPS Proceedings, Vol. 41-I, FJCC, 1972, pp. 579–586.Google Scholar
- Flynn, M. J., "Some Computer Organizations and Their Effectiveness", IEEE Transactions on Computers, Vol. C-21, No. 9, pp. 948–960, September 1972.Google Scholar
- Flynn, M. J., "Very High-Speed Computing Systems", Proc. IEEE, Vol. 54, pp. 1901–1909, December 1966.Google Scholar
- Slotnick, D. L., Borch, W. C. and McReynolds, R. C., "The Soloman Computer—A Preliminary Report", in Proc. 1962 Workshop on Computer Organization, Washington, D.C.: Spartan, 1963, p. 66.Google Scholar
- Lewis, D. R. and Mellen, G. E., "Stretching LARC's, Capability by 100—A New Multiprocessor System", presented at the 1964 Symp. Microelectronics and Large Systems, Washington, D.C.Google Scholar
- Amdahl, G. M., "Validity of the Single Processor Approach to Achieving Large Scale Computing Capabilities", in 1967 Spring Joint Computer Conf. AFIPS Conf. Proc., Vol. 30. Washington, D.C.: Thompson, 1967, p. 483.Google Scholar
- Minsky, M. and Papert, S., "On Some Associative, Parallel, and Analog Computations", in Associative Information Techniques, E. J. Jacks, Ed., New York: Elsevier, 1971.Google Scholar
- Stone, H. S., "The Organization of High-Speed Memory for Parallel Block Transfer of Data", IEEE Trans. Comput., Vol. C-19, pp. 47–53, January 1970.Google Scholar
- Pease, M. C., "An Adaptation of the Fast Fourier Transform for Parallel Processing", J. Ass. Comput. Mach., Vol. 15, pp. 252–264, April 1968.Google Scholar
- Pease, M. C., "Matrix Inversion Using Parallel Processing", J. Ass. Comput. Mach., Vol. 14, pp. 69–74, 1971.Google Scholar
- Neuhauser, C., "Communications in Parallel Processors", The Johns Hopkins University, Baltimore, MD, Comput. Res. Rep. 18, December 1971.Google Scholar
- Chen, T. C., "Parallelism, Pipelining and Computer Efficiency" Comput. Des., Vol. 10, pp. 69–74, 1971.Google Scholar
- Kuck, D., Muraoka, Y., and Chen, S. C., "On the Number of Operations Simultaneously Executable in Fortran-like Programs and Their Resulting Speedup", IEEE TC, 1972.Google Scholar
- Lee, R. B., "Performance Bounds for Parallel Processors", Digital Systems Lab., Technical Report No. 125, Stanford University, November 1976.Google Scholar
- Mednick, S. E., "Multiprocessor Software Lockout", in Proc. 1968 Ass. Comput. Mach. Nat. Conf., pp. 19–24.Google Scholar
- Flynn, M. J., Podvin, A. and Shimizu, K., "A Multiple Instruction Stream Processor With Shared Resources", in Parallel Processor Streams, C. Hobbs, Ed., Washington, D.C.: Spartan, 1970.Google Scholar
- Flynn, M. J., "Shared Internal Resources in a Multiprocessor" in 1971 IFIPS Congr. Proc. Google Scholar
- Freeman, Martin, et al, "A Model for the Construction of Operating Systems," unpublished manuscript, in preparation 1977.Google Scholar
- Jacobs, W. W., "Control Systems in Robots," Proceedings of the ACM 25th Anniversary Conference, vol. 1, 1972, pp. 110–117.Google Scholar