The implementation of APL on an associative processor

  • M. J. Harrison
  • W. H. Harrison
Session 2: Associative Processors
Part of the Lecture Notes in Computer Science book series (LNCS, volume 24)


This paper describes an implementation of an APL interpreter on a hypothetical associative array processor. The processor is described along with those portions of its instruction set which relate to the associative array processing capabilities of the machine. The data representations used in the APL implementation are described, followed by descriptions of several useful service functions. An algorithm is presented for each APL operator. A general evaluation of the performance of this implementation is made, followed by a technique for producing detailed performance estimates from trace information. A detailed performance analysis of each APL operator is provided for this purpose.


Field Specification Element Number Parallel Processor Machine Instruction Index Pair 
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  1. [1]
    S. Pakin, APL/360 Reference Manual, Science Research Associates, Inc., (1968), 160 pp.Google Scholar
  2. [2]
    T. Feng, and W. Cheng, "Associative Computation of Some Mathematical Problems," Dept. of Electrical and Computer Engineering, Syracuse University, (May, 1974), 76 pp.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1975

Authors and Affiliations

  • M. J. Harrison
    • 1
  • W. H. Harrison
    • 2
  1. 1.System Development DivisionYorktown Heights
  2. 2.Research Division IBMYorktown Heights

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