Programmable radar signal processing using the RAP
This paper describes the architecture of the Raytheon Associative/Array Processor (RAP) and its application to real-time radar signal processing. The nature of radar computations is analyzed and parallel processing requirements are characterized. The effects of these requirements upon the design of the RAP are described. Features of the operational RAP system are discussed. Finally, an implementation of a Constant False Alarm Rate (CFAR) Processor is given.
KeywordsProcessing Element Range Cell Array Processor Constant False Alarm Rate Radar Signal Processing
Unable to display preview. Download preview PDF.
- M. Bernfeld, Manuscript, "A Comprehensive Refresher in Radar Theory," pp. 3–23.Google Scholar
- H.R. Downs, "Aircraft Conflict Detection in an Associative Processor," AFIPS Conference Proceedings, Vol. 42, 1973, AFIPS Press, pp. 177–180.Google Scholar
- G.R. Couranz, M.S. Gerhardt, and C.J. Young, "Associative Processor", Internal Raytheon Report ER74-4003, March 1974.Google Scholar
- G. Estrin, and R. Fuller, "Algorithms for Content-Addressable Memories," Proc. IEEE Pacific Computer Conf., pp. 118–130, 1963.Google Scholar
- K.J. Thurber, and R.O. Berg, "Applications of Associative Processors," Computer Design, November 1971, pp. 103–110.Google Scholar
- H. Stone, "Parallel Processing with the Perfect Shuffle," IEEE Trans. on Computers, February 1971, pp. 153–161.Google Scholar
- M.C. Pease, "An Adaptation of the Fast Fourier Transform to Parallel Processing," J. ACM, Vol. 15, April 1968, pp. 252–264.Google Scholar
- P. Barr, "Study and Documentation of Existing Algorithms for Signal Processing of Radar Returns," Raytheon Memo EM74-0173, 28 February 1974.Google Scholar