Simulated Fault Injection in Quantum Circuits with the Bubble Bit Technique
The simulation of quantum circuits is usually exponential. The Hardware Description Languages methodology is able to isolate the entanglement as source of simulation complexity. However, it was shown that this methodology is not efficient unless the bubble bit technique is employed . In this paper, we present an extension of the HDL-bubble bit simulation methodology, which provides means for simulated fault injection — at the unitary level — in quantum circuits. The purpose is, just like in classical computer hardware design, to be able to verify the effectiveness of the considered quantum circuit fault tolerance methodologies.
KeywordsQuantum Circuit Full Adder Fault Injection Setup Phase Arithmetic Circuit
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