Architecture and Performance of Dynamic Offloader for Cluster Network

  • Keiichi Aoki
  • Hiroki Maruoka
  • Koichi Wada
  • Masaaki Ono
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4330)


This paper presents an architecture of the dynamic offloading mechanism, called Maestro Dynamic Offloading Mechanism(MDO), for the intelligent cluster network Maestro2. By using MDO, programmers can offload software modules to the network interface and the switch dynamically. MDO provides programmers functional APIs with which programmers can develop offload modules efficiently. MDO also includes wrapper library that enables the offload modules to be executed on the host processors as well as on the network devices. The results of performance evaluation showed that the performance of the collective communications can be improved by offloading communication procedures to the network devices using MDO. The overhead of the MDO and the traffic on PCI bus are also discussed.


Application Program Software Module Network Interface Network Device Cluster Network 
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  1. 1.
    Boden, N.J., Cohen, D., Felderman, R.E., Kulawik, A.E., Seitz, C.L., Seizovic, J.N., Su, W.K.: Myrinet – a gigabit-per-second local-area network. IEEE Micro 15(1), 29–35 (1995)CrossRefGoogle Scholar
  2. 2.
    Beecroft, J., Addison, D., Petrini, F., McLaren, M.: QsnetII: An interconnect for supercomputing applications. Technical report, Quadrics Ltd. (2003)Google Scholar
  3. 3.
    Infiniband Trade Association: InfiniBand Architecture Specification, Release1.0 (2000)Google Scholar
  4. 4.
    Myricom, Inc: The GM Message Passing System (1999)Google Scholar
  5. 5.
    Takahashi, T., Sumimoto, S., Hori, A., Harada, H., Ishikawa, Y.: PM2: High performance communication middleware for heterogeneous network environment. In: Proceedings of the IEEE/ACM SC2000 Conference, pp. 52–53 (2000)Google Scholar
  6. 6.
    Pfister, G.F.: An introduction to the infiniband architecture. In: Hai, J., Toni, C., Buyya, R. (eds.) High Performance Mass Storage and Parallel I/O, pp. 617–632. John Wiley & Sons Inc., Chichester (2001)Google Scholar
  7. 7.
    Bierbaum, N.: MPI and embedded TCP/IP gigabit ethernet cluster computing. In: Proceedings of the 27th Annual IEEE Conference on Local Computer Networks (LCN 2002), p. 733 (2002)Google Scholar
  8. 8.
    Mogul, J.C.: TCP offload is a dumb idea whose time has come. In: Proceedings of the 9th Workshop on Hot Topics in Operating Systems (HotOS IX), pp. 25–30 (2003)Google Scholar
  9. 9.
    Brightwell, R., Underwood, K.D.: An analysis of NIC resource usage for offloading MPI. In: Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004) (2004)Google Scholar
  10. 10.
    Aoki, K., Yamagiwa, S., Ferreira, K., Campos, L.M., Ono, M., Wada, K., Sousa, L.: Maestro2: High speed network technology for high performance computing. In: Proceedings of 2004 IEEE International Conference on Communication (ICC 2004), vol. 2, pp. 1033–1037 (2004)Google Scholar
  11. 11.
    Aoki, K., Wada, K., Ono, M., Yamagiwa, S.: High performance message passing library for maestro2 cluster network. In: Proceedings of the 23rd IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN 2005), pp. 199–204 (2005)Google Scholar
  12. 12.
    IEEE Standard Department: IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI) (1996)Google Scholar
  13. 13.
    Freescale Semiconductor, Inc: MPC603e RISC Microprocessor User’s Manual (2002)Google Scholar
  14. 14.
    Xilinx Inc: Virtex-II Platform FPGA Data Sheet (2002),
  15. 15.
    Gropp, W., Lusk, E., Doss, N., Skjellum, A.: A high-performance, portable implementation of the MPI message passing interface standard. Parallel Computing 22(6), 789–828 (1996)MATHCrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Keiichi Aoki
    • 1
  • Hiroki Maruoka
    • 1
  • Koichi Wada
    • 1
  • Masaaki Ono
    • 1
  1. 1.Department of Computer ScienceUniversity of TsukubaIbarakiJapan

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