The Optimum Network on Chip Architectures for Video Object Plane Decoder Design

  • Vu-Duc Ngo
  • Huy-Nam Nguyen
  • Hae-Wook Choi
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4330)


On Chip Network (OCN) has been proposed as a new methodology for addressing the design challenges of future massly integrated system in nanoscale. In this paper, three differently heterogenous Tree-based network topologies are proposed as the OCN architectures for Video Object Plane Decoder (VOPD). The topologies are designed in order to maximize the system throughput. This paper also evaluates the proposed topologies by comparing them to other conventional topologies such as 2-D Mesh and Fat-Tree with respects to throughput, power consumption and size. We use the power modelling tool, known as Orion model to calculate the static powers, areas, and dynamic energies of three topologies. The experiment results show that our Tree-based topologies offer similar throughputs as Fat-Tree does and much higher throughputs compared to 2-D Mesh while use less chip areas and power consumptions.


Power Dissipation Output Port System Throughput Orion Model Crossbar Switch 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Vu-Duc Ngo
    • 1
  • Huy-Nam Nguyen
    • 1
  • Hae-Wook Choi
    • 1
  1. 1.System VLSI Lab, SITI Research Center, School of EngineeringInformation and Communications University (ICU)YusongKorea

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