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Smart Architecture for High-Speed Intrusion Detection and Prevention Systems

  • Chih-Chiang Wu
  • Sung-Hua Wen
  • Nen-Fu Huang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4301)

Abstract

The overall performance of an intrusion protection system depends not only on the packet header classification and pattern matching, but also on the post-operative determination of correlative patterns of matched rules. An increasing number of patterns associated with a rule heighten the importance of correlative pattern matching. This work proposes a TCAM-based smart architecture that supports both deep pattern-matching and correlative pattern-matching. The proposed architecture overcomes the difficulties in implementing TCAM when the patterns are very deep and the rules for packet payload involve many patterns whose positions lie within a range. A real case payload is simulated using a Snort 2.3 rule set and simulation results demonstrate the feasibility of the proposed architecture in supporting a high-speed and robust intrusion detection and prevention system.

Keywords

Clock Cycle Intrusion Detection Pattern Match Correlative Pattern Bloom Filter 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Chih-Chiang Wu
    • 1
  • Sung-Hua Wen
    • 2
  • Nen-Fu Huang
    • 2
    • 3
  1. 1.Computer and Communication Research Center (CCRC)National Tsing Hua UniversityTaiwan
  2. 2.Institute of Communication EngineeringNational Tsing Hua UniversityTaiwan
  3. 3.Department of Computer ScienceNational Tsing Hua UniversityTaiwan

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