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High-Speed RSA Crypto-processor with Radix-4 Modular Multiplication and Chinese Remainder Theorem

  • Bonseok Koo
  • Dongwook Lee
  • Gwonho Ryu
  • Taejoo Chang
  • Sangjin Lee
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4296)

Abstract

Today, RSA is one of the most popular public-key crypto-system in various applications. In this paper, we present a high-speed RSA crypto-processor with modified radix-4 Montgomery multiplication algorithm and Chinese Remainder Theorem (CRT). Our design takes 0.84M clock cycles for a 1024-bit modular exponentiation and 0.25M clock cycles for two 512-bit exponentiations. Using 0.18 um standard cell library, the processor achieves 365Kbps for a 1024-bit exponentiation and 1,233Kbps for two 512-bit exponentiations at a 300MHz clock rate. For the high performance RSA crypto-system, the processor can also execute modular reduction, which is essential for calculating the Montgomery mapping constant and the modularly reduced ciphertext in CRT technique.

Keywords

RSA Montgomery multiplication Booth’s algorithm Carry Save Adder Chinese Remainder Theorem 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Bonseok Koo
    • 1
  • Dongwook Lee
    • 1
  • Gwonho Ryu
    • 1
  • Taejoo Chang
    • 1
  • Sangjin Lee
    • 2
  1. 1.National Security Research InstituteDaejeonKorea
  2. 2.Graduate School of Information SecurityKorea UniversitySeoulKorea

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