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Automating Verification of Loops by Parallelization

  • Tobias Gedell
  • Reiner Hähnle
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4246)

Abstract

Loops are a major bottleneck in formal software verification, because they generally require user interaction: typically, induction hypotheses or invariants must be found or modified by hand. This involves expert knowledge of the underlying calculus and proof engine. We show that one can replace interactive proof techniques, such as induction, with automated first-order reasoning in order to deal with parallelizable loops, where a loop can be parallelized whenever it avoids dependence of the loop iterations from each other. We develop a dependence analysis that ensures parallelizability. It guarantees soundness of a proof rule that transforms a loop into a universally quantified update of the state change information represented by the loop body. This makes it possible to use automatic first order reasoning techniques to deal with loops. The method has been implemented in the KeY verification tool. We evaluated it with representative case studies from the Java Card domain.

Keywords

Dependence Analysis Loop Variable Loop Iteration Dynamic Logic Symbolic Execution 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Tobias Gedell
    • 1
  • Reiner Hähnle
    • 1
  1. 1.Department of Computing ScienceChalmers University of TechnologyGöteborgSweden

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