A New Encryption and Hashing Scheme for the Security Architecture for Microprocessors

  • Jörg Platte
  • Raúl Durán Díaz
  • Edwin Naroska
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4237)


In this paper we revisit SAM, a security architecture for microprocessors that provides memory encryption and memory verification using hash values, including a summary of its main features and an overview of other related architectures. We analyze the security of SAM architecture as originally proposed, pointing out some weaknesses in security and performance. To overcome them, we supply another hashing and protection schemes which strengthen the security and improve the performance of the first proposal. Finally, we present some experimental results comparing the old and new schemes.


Hash Function Encryption Scheme Clock Cycle Cache Line Security Architecture 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© IFIP International Federation for Information Processing 2006

Authors and Affiliations

  • Jörg Platte
    • 1
  • Raúl Durán Díaz
    • 1
  • Edwin Naroska
    • 1
  1. 1.Institut für Roboterforschung, Abteilung InformationstechnikUniversität DortmundGermany

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