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International Workshop on Cryptographic Hardware and Embedded Systems

CHES 2006: Cryptographic Hardware and Embedded Systems - CHES 2006 pp 415–429Cite as

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  2. Cryptographic Hardware and Embedded Systems - CHES 2006
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Superscalar Coprocessor for High-Speed Curve-Based Cryptography

Superscalar Coprocessor for High-Speed Curve-Based Cryptography

  • K. Sakiyama18,
  • L. Batina18,
  • B. Preneel18 &
  • …
  • I. Verbauwhede18 
  • Conference paper
  • 2839 Accesses

  • 19 Citations

Part of the Lecture Notes in Computer Science book series (LNSC,volume 4249)

Abstract

We propose a superscalar coprocessor for high-speed curve-based cryptography. It accelerates scalar multiplication by exploiting instruction-level parallelism (ILP) dynamically and processing multiple instructions in parallel. The system-level architecture is designed so that the coprocessor can fully utilize the superscalar feature. The implementation results show that scalar multiplication of Elliptic Curve Cryptography (ECC) over GF(2163), Hyperelliptic Curve Cryptography (HECC) of genus 2 over GF(283) and ECC over a composite field, GF((283)2) can be improved by a factor of 1.8, 2.7 and 2.5 respectively compared to the case of a basic single-scalar architecture. This speed-up is achieved by exploiting parallelism in curve-based cryptography. The coprocessor deals with a single instruction that can be used for all field operations such as multiplications and additions. In addition, this instruction only allows one to compute point/divisor operations. Furthermore, we provide also a fair comparison between the three curve-based cryptosystems.

Keywords

  • Superscalar
  • instruction-level parallelism
  • coprocessor
  • curve-based cryptography
  • scalar multiplication
  • HECC
  • ECC

Kazuo Sakiyama and Lejla Batina are funded by FWO projects (G.0450.04, G.0141.03). This research has been also supported by IBBT-QoE and the EU IST FP6 projects SCARD, SESOC, ECRYPT.

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Author information

Authors and Affiliations

  1. Department Electrical Engineering – ESAT/SCD-COSIC, Katholieke Universiteit Leuven / IBBT, Kasteelpark Arenberg 10, B-3001, Leuven-Heverlee, Belgium

    K. Sakiyama, L. Batina, B. Preneel & I. Verbauwhede

Authors
  1. K. Sakiyama
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  2. L. Batina
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  3. B. Preneel
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  4. I. Verbauwhede
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Editor information

Editors and Affiliations

  1. Versailles Saint-Quentin-en-Yvelines University, 45 Avenue des Etats-Unis, 78035, Versailles Cedex, France

    Louis Goubin

  2. Information Technology R&D Center, Mitsubishi Electric Corporation, 5-1-1 Ofuna Kamakura Kanagawa, Japan

    Mitsuru Matsui

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Sakiyama, K., Batina, L., Preneel, B., Verbauwhede, I. (2006). Superscalar Coprocessor for High-Speed Curve-Based Cryptography. In: Goubin, L., Matsui, M. (eds) Cryptographic Hardware and Embedded Systems - CHES 2006. CHES 2006. Lecture Notes in Computer Science, vol 4249. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11894063_33

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  • DOI: https://doi.org/10.1007/11894063_33

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