Advertisement

A Novel Multiplier for Achieving the Programmability of Cellular Neural Network

  • Peng Wang
  • Xun Zhang
  • Dongming Jin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4234)

Abstract

A novel CMOS four-quadrant analog-digital multiplier for implementing a programmable Cellular Neural Network (CNN) is presented. The circuit, which can be fabricated in a standard CMOS process, performs the four-quadrant weighting of interconnect signals. Using this multiplier a programmable CNN neuron can be implemented with little expense. Both simulation and test results are given for the circuit fabricated in a standard, mixed signal, 0.18μm, CMOS process. According to this design, one input is analog voltage and the other input is digital signal. The linearity deviation is less than 1% in the dynamic range (1.0V,2.2V) centered on Vref=1.6V. The power supply voltage is 3.3V.

Keywords

Cellular Neural Network Power Supply Voltage VLSI Implementation Standard CMOS Process Lossless Image Compression 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Chua, L.O., Yang, L.: Cellular Neural Networks: Theory. Circuits and Systems. IEEE Transactions on 35(10), 1257–1272 (1988)MATHMathSciNetGoogle Scholar
  2. 2.
    Harrer, H., Venetianer, P.L., Nossek, J.A., Roska, T., Chua, L.O.: Some Examples of Preprocessing Analog Images with Discrete-Time Cellular Neural Networks. In: Cellular Neural Networks and their Applications. CNNA 1994, Proceedings of the Third IEEE International Workshop on, pp. 201–206 (1994)Google Scholar
  3. 3.
    Tanaka, M., Tanji, Y., Onishi, M., Nakaguchi, T.: Lossless Image Compression and Reconstruction by Cellular Neural Networks. In: Cellular Neural Networks and Their Applications, 2000 (CNNA 2000). Proceedings of the 2000 6th IEEE International Workshop on, pp. 57–62 (2000)Google Scholar
  4. 4.
    Khryasshyov, V.V., Sautov, E.Y., Sokolenko, E.A.: Cellular Neural Network in Image Filtration Tasks. In: Circuits and Systems for Communications, 2002. Proceedings. ICCSC 2002. 1st IEEE International Conference on, pp. 267–270 (2002)Google Scholar
  5. 5.
    Cardarilli, G.C., Lojacono, R., Salerno, M., Sargeni, F.: VLSI Implementation of a Cellular Neural Network with Programmable Control Operator. In: Circuits and Systems, 1993. Proceedings of the 36th Midwest Symposium on, vol. 2, pp. 1089–1092 (1993)Google Scholar
  6. 6.
    Espejo, S., Carmona, R., Dominguez-Castro, R., Rodriguez-Vazquez, A.: A CNN Universal Chip in CMOS Technology. International Journal of Circuit Theory and Applications 24, 93–109 (1996)CrossRefGoogle Scholar
  7. 7.
    Sindhwani, M., Srikanthan, T., Asari, K.V.: VLSI Efficient Discrete-Time Cellular Neural Network Processor. Circuits, Devices and Systems, IEE Proceedings 149(3), 167–171 (2002)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Peng Wang
    • 1
  • Xun Zhang
    • 1
  • Dongming Jin
    • 1
  1. 1.Institute of MicroelectronicsTsinghua UniversityBeijingP.R. China

Personalised recommendations