Synchronization Via Multiplex Spike-Trains in Digital Pulse Coupled Networks
This paper studies pulse-coupled network of digital spiking neurons and its basic dynamics. The neuron is constructed by coupling two shift registers and has a variety of spike-trains which correspond to digital codes through a inter-spike interval (ISI) modulation. The pulse-coupled network has master-slave configuration. All the spike-trains of neurons in the master side are multiplexed additionally and are transmitted to the slave side via single line. Neurons in the slave side are connected by dynamic winner-take-all function. As parameters are selected suitably, the slave can realize demultiplexing and master-slave synchronization is achieved. VHDL simulation is also discussed for FPGA implementation and this digital network is compared with an analog network.
KeywordsSpike Train Digital Code FPGA Implementation Pulse Couple Neural Network Synchronization Phenomenon
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