FPGA Discrete Wavelet Transform Encoder/Decoder Implementation

  • Pedro Henrique Cox
  • Aparecido Augusto de Carvalho
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4234)


In a multi-input an multi-output feedforward wavelet neural network, orthogonal wavelet basis functions are used as activate function instead of sigmoid function of feedforward network. This paper adresses the solution on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC’s and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. One integrated circuit Encoder/Decoder, ultrasonic range, is presented.


Discrete Wavelet Transform Wavelet Coefficient Filter Coefficient Inverse Filter Discrete Wavelet Transform Coefficient 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Mallat, S.G.: A theory for multiresolution signal decomposition: The wavelet representation. IEEE Trans. P. Anal. Machine Intell. 2, 674–693 (1989)CrossRefGoogle Scholar
  2. 2.
    Mandal Mrinal, K., Sethuraman, P.: VLSI Implementation of Discrete Wavelet Transform. IEEE Trans. on VLSI Syst. 4 (1996)Google Scholar
  3. 3.
    Lu, Zhitao, Kim, Pearlman, William, A.: Wavelet Compression of ECG Signals by the Set Partitioning in Hierarchical Trees Algorithm. IEEE Trans. On Biomedical Eng. 47(7) (2000)Google Scholar
  4. 4.
    Rajoub, B.A.: An Efficient Coding Algorithm for the Compression of ECG Signal Using the Wavelet Transform. IEEE Tr. on B. Eng. 49(4) (2002)Google Scholar
  5. 5.
    Iyengar, S.S.: Foundations of wavelet network and applications. Chapman & Hall/ CRC Press LLC (2002)Google Scholar
  6. 6.
    Chakrabarti, Chaitali, Vishwnath, Mohan: Efficient realizations of the Discrete and Continuous Wavelet Transforms: From Single Chip Implementations to Mappings on SIMD Array Computers. IEEE Trans. on Signal Processing 43(3) (1995)Google Scholar
  7. 7.
    Parhi, K.K.: Synthesis of Control Circuits in Folded Pipelined DSP Architectures. IEEE Journal of Solid-State Circuits 27(1) (1992)Google Scholar
  8. 8.
    Vishwanath, M.: The Recursive Pyramid Algorithm for the Discrete Wavelet Transform. IEEE Trans. on Signal Processing 42(3) (1994)Google Scholar
  9. 9.
    Huluta, E., Petriu, E.M., Das, S.R., Al-Dhaer, A.H.: Discrete Wavelet Transform Architecture Using Fast Processing Elements. In: IEEE Inst. and Meas. Techn. Conference (2002)Google Scholar
  10. 10.
    Angrisani, L., Daponte, P., D’Apuzzo, M., Pietrosanto, A.: A VXI Signal Analyzer based on the Wavelet Transform. In: IEEE Inst. and Meas. Techn. Conference, May 1997, pp. 440–445 (1997)Google Scholar
  11. 11.
    Vishwanath, M., Owens, R.M.: A Common Architecture For the DWT and IDWT. IEEE, pp. 193–198 (1996)Google Scholar
  12. 12.
    Habib, S.E.-D.: An Efficient FPGA Implementation of a Wavelet Coder/Decoder. In: The 12th International Conference on Microelectronics, Tehran, October 31 – November 2 (2000)Google Scholar
  13. 13.
    Miaou, Shaou-Gang, Lin, Chih-Lung: A Quality-on-Demand Algorithm for Wavelet-Based Compression of electrocardiogram signals. IEEE Trans. on Biomedical Engineering 49(3) (2002)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Pedro Henrique Cox
    • 1
  • Aparecido Augusto de Carvalho
    • 2
  1. 1.Fundacão Universidade Federal de Mato Grosso do SulCidade UniversitáriaBrazil
  2. 2.Faculdade de Engenharia de Ilha SolteiraUniversidade do Estado de São PauloIlha SolteiraBrazil

Personalised recommendations