Two-Level Dynamic Programming Hardware Implementation for Real Time Processing

  • Yong Kim
  • Hong Jeong
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4251)


In this paper, we present an efficient architecture for connected speech recognition that can be efficiently implemented with FPGA. The architecture consists of newly derived two-level dynamic programming(TLDP) that use only bit addition and shift operations. The advantages of this architecture are the spatial efficiency to accommodate more words with limited space and the computational speed from avoiding propagation delays in multiplications. The architecture is highly regular, consisting of identical and simple processing elements with only nearest-neighbor communication, and external communication occurs with the end processing elements. In order to verify the proposed architecture, we have also designed and implemented it, prototyping with Xilinx FPGAs running at 33MHz.


Hide Markov Model Speech Recognition Processing Element Clock Signal Reference Pattern 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Yoshizawa, S., Miyanaga, Y., Wada, N.: A Low-power VLSI Design of an HMM Based Speech Recognition System. In: Circuits and Systems, 2002. MWSCAS-2002, vol. 2, pp. II-489–II-492 (2002)Google Scholar
  2. 2.
    Han, W., Hon, K.-W., Chan, C.-F., Lee, T., Choy, C.-S., Pun, K.-P., Ching, P.C.: An HMM-based speech recognition IC. In: Circuits and Systems, 2003. ISCAS 2003, vol. 2, pp. II-744–II-747 (2003)Google Scholar
  3. 3.
    Elmisery, F.A., Khalil, A.H., Salama, A.E., Hammed, H.F.: A FPGA-based HMM for a discrete Arabic speech recognition system. In: Microelectronics, 2003. ICM 2003, pp. 322–325 (2003)Google Scholar
  4. 4.
    Caradarilli, G.C., Malatesta, A., Re, M., Arnone, L., Bocchio, S.: Hardware Oriented Architectures for Continuous-Speech Speaker-Independent ASR Systems. In: Signal Processing and Information Technology, December 2004, pp. 346–352, 18-21 (2004)Google Scholar
  5. 5.
    Rabiner, L., Juang, B.-H.: Fundamentals of Speech Recognition, pp. 321–433. Prentice-Hall, New Jersey (1993)Google Scholar
  6. 6.
    Sakoe, H.: Two-Level DP-Matching–A Dynamic Programming-Based Patten Matching Algorithm for Connected Word Recognition. IEEE Transactions on Acoustics, Speech and Signal Processing 27(6), 588–595 (1979)CrossRefGoogle Scholar
  7. 7.
    Nakagawa, S.: A Connected Spoken Word Recognition Method by O(n) Dynamic Programming Pattern Matching Algorithm. In: IEEE International Conference on ASSP, vol. 8, pp. 296–299 (1983)Google Scholar
  8. 8.
    Ney, H.: A Comparative Study of Two Search Strategies for Connected Word Recognition: Dynamic Programming and Heuristic Search. IEEE Transactions on Pattern Ananysis and Machine Intellinence 14(5), 586–595 (1992)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Yong Kim
    • 1
  • Hong Jeong
    • 1
  1. 1.Department of Electronic and Electrical EngineeringPOSTECHPohangSouth Korea

Personalised recommendations