Abstract
In this paper, we present an efficient architecture for connected speech recognition that can be efficiently implemented with FPGA. The architecture consists of newly derived two-level dynamic programming(TLDP) that use only bit addition and shift operations. The advantages of this architecture are the spatial efficiency to accommodate more words with limited space and the computational speed from avoiding propagation delays in multiplications. The architecture is highly regular, consisting of identical and simple processing elements with only nearest-neighbor communication, and external communication occurs with the end processing elements. In order to verify the proposed architecture, we have also designed and implemented it, prototyping with Xilinx FPGAs running at 33MHz.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Yoshizawa, S., Miyanaga, Y., Wada, N.: A Low-power VLSI Design of an HMM Based Speech Recognition System. In: Circuits and Systems, 2002. MWSCAS-2002, vol. 2, pp. II-489–II-492 (2002)
Han, W., Hon, K.-W., Chan, C.-F., Lee, T., Choy, C.-S., Pun, K.-P., Ching, P.C.: An HMM-based speech recognition IC. In: Circuits and Systems, 2003. ISCAS 2003, vol. 2, pp. II-744–II-747 (2003)
Elmisery, F.A., Khalil, A.H., Salama, A.E., Hammed, H.F.: A FPGA-based HMM for a discrete Arabic speech recognition system. In: Microelectronics, 2003. ICM 2003, pp. 322–325 (2003)
Caradarilli, G.C., Malatesta, A., Re, M., Arnone, L., Bocchio, S.: Hardware Oriented Architectures for Continuous-Speech Speaker-Independent ASR Systems. In: Signal Processing and Information Technology, December 2004, pp. 346–352, 18-21 (2004)
Rabiner, L., Juang, B.-H.: Fundamentals of Speech Recognition, pp. 321–433. Prentice-Hall, New Jersey (1993)
Sakoe, H.: Two-Level DP-Matching–A Dynamic Programming-Based Patten Matching Algorithm for Connected Word Recognition. IEEE Transactions on Acoustics, Speech and Signal Processing 27(6), 588–595 (1979)
Nakagawa, S.: A Connected Spoken Word Recognition Method by O(n) Dynamic Programming Pattern Matching Algorithm. In: IEEE International Conference on ASSP, vol. 8, pp. 296–299 (1983)
Ney, H.: A Comparative Study of Two Search Strategies for Connected Word Recognition: Dynamic Programming and Heuristic Search. IEEE Transactions on Pattern Ananysis and Machine Intellinence 14(5), 586–595 (1992)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Kim, Y., Jeong, H. (2006). Two-Level Dynamic Programming Hardware Implementation for Real Time Processing. In: Gabrys, B., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based Intelligent Information and Engineering Systems. KES 2006. Lecture Notes in Computer Science(), vol 4251. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11892960_131
Download citation
DOI: https://doi.org/10.1007/11892960_131
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-46535-5
Online ISBN: 978-3-540-46536-2
eBook Packages: Computer ScienceComputer Science (R0)