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Case Study of a Fault Attack on Asynchronous DES Crypto-Processors

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Fault Diagnosis and Tolerance in Cryptography (FDTC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 4236))

Abstract

This paper proposes a practical fault attack on two asynchronous DES crypto-processors, a reference version and a hardened version, using round reduction. Because of their specific architecture, asynchronous circuits have a very specific behavior in the presence of faults. Previous works show that they are an interesting alternative to design robust systems. However, this paper demonstrates that there are weaknesses left, and that we are able both to identify and exploit them. The effect of the fault is to reduce the number of rounds by corrupting the multi-rail round counter protected by alarm cells. The fault injection mean is a laser. A description of the fault injection process is presented, followed by how the results can be used to retrieve the key. Weaknesses are theoretically identified and analyzed. Finally, possible counter-measures are described.

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© 2006 Springer-Verlag Berlin Heidelberg

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Monnet, Y., Renaudin, M., Leveugle, R., Clavier, C., Moitrel, P. (2006). Case Study of a Fault Attack on Asynchronous DES Crypto-Processors. In: Breveglieri, L., Koren, I., Naccache, D., Seifert, JP. (eds) Fault Diagnosis and Tolerance in Cryptography. FDTC 2006. Lecture Notes in Computer Science, vol 4236. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11889700_9

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  • DOI: https://doi.org/10.1007/11889700_9

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-46250-7

  • Online ISBN: 978-3-540-46251-4

  • eBook Packages: Computer ScienceComputer Science (R0)

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