Using UML Activities for System-on-Chip Design and Synthesis

  • Tim Schattkowsky
  • Jan Hendrik Hausmann
  • Gregor Engels
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4199)


The continuous advances in manufacturing Integrated Circuits (ICs) enable complete systems on a single chip. However, the design effort for such System-on-Chip (SoC) solutions is significant. The productivity of the design teams currently lags behind the advances in manufacturing and this design productivity gap is still widening. One important reason is the lack of abstraction in traditional Hardware Description Languages (HDLs) like VHDL. The UML provides more abstract concepts for modeling behavior that can also be employed for hardware design. In particular, the new UML Activity semantics fit nicely with the inherent data flow in hardware systems. Therefore, we introduce a UML-based design approach for complete SoC specification. Our approach enables generation of complete synthesizable HDL code. The equivalent hardware can be automatically generated using the existing tools chains. As an example, we outline Handel-C code generation for an MP3 decoder design.


Unify Modeling Language Field Programmable Gate Array Class Diagram Activity Diagram Hardware Design 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Tim Schattkowsky
    • 1
  • Jan Hendrik Hausmann
    • 2
  • Gregor Engels
    • 2
  1. 1.C-LabPaderbornGermany
  2. 2.University of PaderbornPaderbornGermany

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