The New BCD Subtractor and Its Reversible Logic Implementation

  • Himanshu Thapliyal
  • M. B Srinivas
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4186)


IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Thus in this paper we propose a novel BCD subtractor called carry skip BCD subtractor. We also propose the reversible logic implementation of the proposed carry skip BCD subtractor. Reversible logic is emerging as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. It is not possible to realize quantum computing without reversible logic. It is being tried to design the BCD subtractor optimal in terms of number of reversible gates and garbage outputs.


Reversible Logic Full Adder Toffoli Gate Reversible Gate Reversible Circuit 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Himanshu Thapliyal
    • 1
  • M. B Srinivas
    • 1
  1. 1.International Institute of Information TechnologyCenter for VLSI and Embedded System TechnologiesHyderabadIndia

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