Skip to main content

Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT Processors

  • Conference paper
Book cover Advances in Computer Systems Architecture (ACSAC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4186))

Included in the following conference series:

Abstract

In Simultaneous Multithreading (SMT) processors, the instruction fetch policy implicitly determines shared resources allocation among all the co-scheduled threads, and consequently affects throughput and fairness. However, prior work on fetch policies almost focuses on throughput optimization. The issue of fairness between threads in progress rates is studied rarely.

In this paper, we take fairness as the optimization goal and propose an enhanced version of ICOUNT2.8 with better fairness called ICOUNT2.8-fairness. Results show that using ICOUNT2.8-fairness, RPRrange (a fairness metric defined in this paper) is less than 5% for all types of workloads, and the degradation of overall throughput is not more than 7%. Especially, for two-thread MIX workload, ICOUNT2.8-fairness outperforms ICOUNT2.8 in throughput at the same time of achieving better fairness.

This work was supported by Chinese NSF under the grant No.60376018.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Tullsen, D., Eggers, S., Levy, H.: Simultaneous multithreading: Maximizing on-chip parallelism. In: Proc. ISCA-22 (1995)

    Google Scholar 

  2. Tullsen, D., Eggers, S., Emer, J., Levy, H., Lo, J., Stamm, R.: Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor. In: Proc. ISCA-23 (1996)

    Google Scholar 

  3. Kim, S., Chandra, D., Solihin, Y.: Fair cache sharing and partitioning in a chip multiprocessor architecture. In: Proc. PACT-13 (2004)

    Google Scholar 

  4. Tullsen, D., Brown, J.: Handling long-latency loads in a simultaneous multithreaded processor. In: Proc. MICRO-34 (2001)

    Google Scholar 

  5. El-Moursy, A., Albonesi, D.: Front-end policies for improved issue efficiency in SMT processors. In: Proc. HPCA-9 (2003)

    Google Scholar 

  6. Snavely, A., Tullsen, D.: Symbiotic jobscheduling for a simultaneous multithreading architecture. In: Proc. ASPLOS-9 (2000)

    Google Scholar 

  7. Tullsen, D.: Simulation and modeling of a simultaneous multithreading processor. In: Proceedings of 22nd Annual Computer Measurement Group Conference (1996)

    Google Scholar 

  8. The standard performance evaluation corporation. WWW site, http://www.specbench.org

  9. Sherwood, T., Perelman, E., Calder, B.: Basic block distribution analysis to find periodic behavior and simulation points in applications. In: Proc. of PACT-10 (2001)

    Google Scholar 

  10. Sherwood, T., Calder, B.: Time varying behavior of programs. Tech. Report UCSDCS99 -630, Univ. of Calif. (1999)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Sun, C., Tang, H., Zhang, M. (2006). Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT Processors. In: Jesshope, C., Egan, C. (eds) Advances in Computer Systems Architecture. ACSAC 2006. Lecture Notes in Computer Science, vol 4186. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11859802_44

Download citation

  • DOI: https://doi.org/10.1007/11859802_44

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40056-1

  • Online ISBN: 978-3-540-40058-5

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics