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A Novel Processor Architecture for Real-Time Control

  • Xiaofeng Wu
  • Vassilios Chouliaras
  • Jose Nunez-Yanez
  • Roger Goodall
  • Tanya Vladimirova
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4186)

Abstract

This paper describes a control system processor architecture based on ΔΣ modulation (ΔΣ-CSP). The ΔΣ-CSP uses 1-bit processing which is a new concept in digital control to remove multi-bit multiplications. A simple conditional-negate-and-add (CNA) unit is proposed for most operations of control laws. For this reason, the targeted processor is small and very fast, making it ideal for embedded real-time control applications. The ΔΣ-CSP has been implemented as a VLSI hard macro in a high-performance 0.13μm silicon process. Results show that it compares very favorably to other digital processors in terms of area and clock frequency.

Keywords

Control System Processing Program Counter Digital Simulation Digital Processor Pulse Density Modulation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Xiaofeng Wu
    • 1
  • Vassilios Chouliaras
    • 2
  • Jose Nunez-Yanez
    • 3
  • Roger Goodall
    • 2
  • Tanya Vladimirova
    • 1
  1. 1.Surrey Space Center, Department of Electronic EngineeringUniversity of SurreyGuildfordUK
  2. 2.Department of Electronic and Electrical EngineeringLoughborough UniversityLeicestershireUK
  3. 3.Department of Electronic EngineeringUniversity of BristolBristolUK

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