Hardware Budget and Runtime System for Data-Driven Multithreaded Chip Multiprocessor

  • Kyriakos Stavrou
  • Pedro Trancoso
  • Paraskevas Evripidou
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4186)


The Data-Driven Multithreading Chip Multiprocessor (DDM-CMP) architecture has been shown to overcome the power and memory wall limitations by combining two key technologies: the use of the Data-Driven Multithreading (DDM) model of execution, and the Chip-Multiprocessor architecture. DDM is able to hide memory and synchronization latencies providing significant performance gains whereas the use of of the CMP architecture offers high-degree of parallelism at low complexity design and is therefore power efficient.

This paper presents the hardware budget analysis and the runtime support system for the DDM-CMP architecture. The hardware analysis shows that the DDM benefits may be achieved with only a 17% hardware cost increase compared to a traditional chip-multiprocessor implementation. The support for the runtime system was designed in such a way that allows the DDM applications to execute on the DDM-CMP chip using a regular, non-modified, Operating System and CPU cores.


Code Block Runtime System Chip Multiprocessor Graph Memory Content Addressable Memory 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Kyriakos Stavrou
    • 1
  • Pedro Trancoso
    • 1
  • Paraskevas Evripidou
    • 1
  1. 1.Department of Computer ScienceUniversity of CyprusNicosiaCyprus

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