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Leakage Power Characterization Considering Process Variations

  • Jose L. Rosselló
  • Carol de Benito
  • Sebastià Bota
  • Jaume Segura
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4148)

Abstract

We present a novel technique to accurately describe the leakage power in CMOS nanometer Integrated Circuits (ICs) considering process variations. The model predicts a leakage power increment due to process variations with high accuracy. It is shown that leakage increases considerably as channel length variations become larger due to technology scaling. The present work also describes accurately the dependence of leakage dispersion with process variations. The model developed shows that, even if channel length variations are kept small the leakage dispersion is considerably large. Finally, the concept of “Hot Gates” (HGs) is introduced, showing that HGs will be an important reliability factor in near future nanometer technologies.

Keywords

Threshold Voltage Channel Length Substrate Doping Total Leakage Technology Scaling 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Jose L. Rosselló
    • 1
  • Carol de Benito
    • 1
  • Sebastià Bota
    • 1
  • Jaume Segura
    • 1
  1. 1.Electronic Technology GroupUniversitat Illes BalearsPalma de MallorcaSpain

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