Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks

  • Alin Razafindraibe
  • Michel Robert
  • Philippe Maurine
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4148)


Based on a first order model of the switching current flowing in CMOS cell, an investigation of the robustness against DPA of dual-rail logic is carried out. The result of this investigation, performed on 130nm process, is a formal identification of the design range in which dual-rail logic can be considered as robust.


Cmos Inverter Differential Power Analysis Validity Domain Asynchronous Circuit Design Range 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Alin Razafindraibe
    • 1
  • Michel Robert
    • 1
  • Philippe Maurine
    • 1
  1. 1.Microelectronics DepartmentLIRMMMontpellierFrance

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