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Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry

  • José C. S. Palma
  • Leandro Soares Indrusiak
  • Fernando G. Moraes
  • Alberto Garcia Ortiz
  • Manfred Glesner
  • Ricardo A. L. Reis
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4148)

Abstract

This work investigates the reduction of power consumption in Networks-on-Chip (NoCs) through the reduction of transition activity using data coding schemes. The estimation of the NoC power consumption is performed with basis on macromodels which reproduce the power consumption on each internal NoC module according to the transition activity on its input ports. Such macromodels are embedded in a system model and a series of simulations are performed, aiming to analyze the trade-off between the power savings due to coding schemes versus the power consumption overhead due to the encoding and decoding modules.

Keywords

Power Consumption Power Saving Average Power Consumption Adaptive Code Intellectual Property Core 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • José C. S. Palma
    • 1
  • Leandro Soares Indrusiak
    • 2
  • Fernando G. Moraes
    • 3
  • Alberto Garcia Ortiz
    • 2
  • Manfred Glesner
    • 2
  • Ricardo A. L. Reis
    • 1
  1. 1.PPGC – IIUFRGSPorto AlegreBrazil
  2. 2.MESTU DarmstadtDarmstadtGermany
  3. 3.PPGCC – FACIN – PUCRSPorto AlegreBrazil

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