Energy-Delay Space Analysis for Clocked Storage Elements Under Process Variations

  • Christophe Giacomotto
  • Nikola Nedovic
  • Vojin G. Oklobdzija
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4148)


In this paper we present the effect of process variations on the design of clocked storage elements. This work proposes to use the Energy-Delay space analysis for a true representation of the design trade-offs. Consequently, this work also shows a comparison of clocked storage elements under a specific set of system constraints for typical corner design and high yield corner design. Finally, we show that designing for high yield can affect the choice of topology in order to achieve energy efficiency.


Process Corner Good Energy Efficiency Semiconductor Research Corporation Typical Corner Power Delay Product 
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  1. 1.
    Stojanovic, V., Oklobdzija, V.: Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems. IEEE JSSC 34(4), 536–548 (1999)Google Scholar
  2. 2.
    Zyuban, V.: Optimization of scannable latches for low energy. IEEE Transactions on VLSI 11(5), 778–788 (2003)CrossRefGoogle Scholar
  3. 3.
    Oklobdzija, V.G., Stojanovic, V.M., Markovic, D.M., Nedovic, N.M.: Digital System Clocking. Wiley-IEEE Press (January 2003)Google Scholar
  4. 4.
    Stojanovic, V., Oklobdzija, V.G.: FLIP-FLOP, US Patent No. 6,232,810 (Issued: 05/15/2001)Google Scholar
  5. 5.
    Nikolic, B., Stojanovic, V., Oklobdzija, V.G., Jia, W., Chiu, J., Leung, M.: Sense Amplifier-Based Flip-Flop. In: 1999 IEEE ISSCC, San Francisco (February 1999)Google Scholar
  6. 6.
    Nedovic, N., Oklobdzija, V.G., Walker, W.W.: A Clock Skew Absorbing Flip-Flop. In: 2003 IEEE ISSCC, San Francisco (February 2003)Google Scholar
  7. 7.
    Tschanz, J., Narendra, S., Chen, Z., Borkar, S., Sachdev, M., De, V.: Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance micro-processors. In: ISLPED, August 6-7, 2001, pp. 147–152 (2001)Google Scholar
  8. 8.
    Nedovic, N.: Clocked Storage Elements for High-Performance Applications, PhD dissertation, University of California Davis (2003)Google Scholar
  9. 9.
    Klass, F.: Semi-Dynamic and Dynamic Flip-Flops with Embedded Logic. In: Symposium on VLSI Circuits, pp. 108–109 (1998)Google Scholar
  10. 10.
    Gerosa, G., Gary, S., Dietz, C., Dac, P., Hoover, K., Alvarez, J.: A 2.2W, 80MHz Superscalar RISC Microprocessor. IEEE JSSC 29, 1440–1452 (1994)Google Scholar
  11. 11.
    Matsui, M., Hara, H., Uetani, Y., Lee-Sup, K., Nagamatsu, T., Watanabe, Y.: A 200 MHz 13 mm2 2-D DCT macrocell using sense-amplifier pipeline flip-flop scheme. IEEE JSSC 29, 1482–1491 (1994); Baldonado, M., Chang, C.-C.K., Gravano, L., Paepcke, A.: The Stanford Digital Library Metadata Architecture. Int. J. Digit. Libr. 1, 108–121 (1997) Google Scholar
  12. 12.
    Patil, D., Yun, S., Kim, S.-J., Cheung, A., Horowitz, M., Boyd, S.: A new method for design of robust digital circuits. In: ISQED 2005, Sixth International Symposium on Quality of Electronic Design, March 21-23, 2005, pp. 676–681 (2005)Google Scholar
  13. 13.
    Markovic, D., Tschanz, J., De, V.: Transmission-gate based flip-flop US Patent 6,642,765, (November 2003)Google Scholar
  14. 14.
    Dao, H., Nowka, K., Oklobdzija, V.: Analysis of Clocked Timing Elements for DVS Effects over Process Parameter Variation. In: Proceedings of the International Symposium on Low Power Electronics and Design, Huntington Beach, California, August 6-7 (2001)Google Scholar
  15. 15.
    Dao, H., Zeydel, B., Oklobdzija, V.: Energy Optimization of Pipelined Digital Systems Using Circuit Sizing and Supply Scaling. IEEE Transactions on VLSI 14(2), 122–134 (2006)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Christophe Giacomotto
    • 1
  • Nikola Nedovic
    • 2
  • Vojin G. Oklobdzija
    • 1
  1. 1.Advanced Computer Systems Engineering Laboratory, Dept. of Electrical and Computer EngineeringUniversity of CaliforniaUSA
  2. 2.Fujitsu Laboratories of AmericaSunnyvaleUSA

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