Digital Filter Design Using Evolvable Hardware Chip for Image Enhancement

  • A. Sumathi
  • R. S. D. Wahida Banu
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4113)


Images acquired through modern cameras may be contaminated by a variety of noise sources (e.g. photon or on chip electronic noise) and also by distortions such as shading or improper illumination. Therefore a preprocessing unit has to be incorporated before recognition to improve image quality. General-purpose image filters lacks the flexibility and adaptability for un-modeled noise types. The EHW architecture evolves filters without any apriori information. The approach chosen here is based on functional level evolution The proposed filter considers spatial domain approach and uses the overlapping window to remove the noise in the image.


Processing Element Field Programmable Gate Array Image Enhancement Adaptive Neuro Fuzzy Inference System Evolvable Hardware 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Vandenberg, L., et al.: Digital image processing techniques. Fractal dimensionality and scale-space applied to surface roughness. Wear 159, 17–30 (1992)MathSciNetGoogle Scholar
  2. 2.
    Kiran, S., et al.: Evaluation of surface roughness by vision system. International J. Mach. Tools Manufact. 38(5-6), 685–690 (1998)CrossRefGoogle Scholar
  3. 3.
    Suresh, L., et al.: A Genetic algoritm approach for optimization of Surface roughness prediction model. The International Jnl. Of Machine Tools & Manufacture 42, 675–680 (2002)CrossRefGoogle Scholar
  4. 4.
    Samhouri, P., et al.: Surface Roughness in Grinding: Off-line Identification with an Adaptive Neuro Fuzzy Inference system. Paper submitted to NAMRAC 33-2005 conference, Columbia, May 24-27 (2005)Google Scholar
  5. 5.
    Higuchi, T., Murakawa, M., Iwata, M., Kajitani, I., Liu, W., Salami, M.: Evolvable Hardware at Function Level. In: Proc. of the IEEE International Conference on Evolutionary Computation, April 1997, pp. 187–192 (1997)Google Scholar
  6. 6.
    Layzell, P.: Reducing Hardware Evolution’s Dependency on FPGAs. In: Proc. of the Seventh International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (MicroNeuro 1999), pp. 171–178. IEEE, Los Alamitos (1999)CrossRefGoogle Scholar
  7. 7.
    Goldberg, D.E.: Genetic Algorithms in Search, Optimization and Machine Learning. Pearson Education, London (1989)MATHGoogle Scholar
  8. 8.
    Hollingworth, G., Smith, S., Tyrrell, A.: Design of Highly Parallel Edge Detection Nodes using Evolutionary Techniques. In: Proc. of the 7th Euromicro Workshop on Parallel and Distributed Processing. IEEE, Los Alamitos (1999)Google Scholar
  9. 9.
    Sekanina, L.: Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 186–198. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  10. 10.
    Sekanina, L.: Image Filter Design with Evolvable Hardware. In: Cagnoni, S., Gottlieb, J., Hart, E., Middendorf, M., Raidl, G.R. (eds.) EvoIASP 2002, EvoWorkshops 2002, EvoSTIM 2002, EvoCOP 2002, and EvoPlan 2002. LNCS, vol. 2279, pp. 255–266. Springer, Heidelberg (2002)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • A. Sumathi
    • 1
  • R. S. D. Wahida Banu
    • 2
  1. 1.Adhiaman college of Engg.Hosur
  2. 2.Government college of EngineeringSalem

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