Iterative Modular Division over GF(2m): Novel Algorithm and Implementations on FPGA
Public key cryptography is a concept used by many useful functionalities such as digital signature, encryption, key agreements, ... For those needs, elliptic curve cryptography is an attractive solution.
Cryptosystems based on elliptic curve need a costly modular division. Depending on the choice of coordinates, this operation is requested at each step of algorithms, during a precomputation phase or at the end of the whole computation. As a result, efficient modular division implementations are useful for both area constrained designs working in affine coordinates and high-speed processors.
For that purpose, this work highlights the most efficient iterative modular division algorithm and explores different time and area tradeoffs on FPGA. First, thanks to a novel algorithm, the computational time is divided by two with an area increase of one half. Second, using the Single-Instruction Multiple-Data feature of the selected algorithm, the area is divided by two with a doubling of the computational time.
To the best of our knowledge, it is the first report about an iterative digit-serial modular division algorithm, the first area and time tradeoff analysis of an iterative algorithm and the best result among the very few implementations on FPGA.
KeywordsElliptic Curve Systolic Array Irreducible Polynomial Elliptic Curve Cryptography Elliptic Curve Cryptosystems
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