A New VLSI Architecture of Lifting-Based DWT
In this paper, we proposed a new architecture of lifting process for JPEG2000 and implemented it as an ASIC. It includes a new cell-structure that executes a unit lifting calculation to satisfy the property of lifting process of a repetitive arithmetic with a unit process. After the operational sequence of lifting arithmetic was analyzed in detail and the causality was imposed to implement in H/W, the unit cell was optimized. A new simple lifting kernel was organized possible by repeatedly arranging the unit cells and a lifting processor was realized with the kernel for Motion JPEG2000. From the comparison with previous works, we could conclude that the proposed architecture shows excellent properties in considering both the cost and the performance.
KeywordsLift Scheme VLSI Architecture Pipeline Architecture Unit Arithmetic Lift Process
Unable to display preview. Download preview PDF.
- 1.Boliek, M., Christopoulos, C., Majani, E.: JPEG2000 part-I fina1 draft international standard: ISO/IEC JTC1/SC29 WG1 (2000)Google Scholar
- 6.Andra, K., Chakrabarti, C., Acharya, T.: A VLSI architecture for lifting-based forward and inverse wavelet transform. IEEE Trans. on Signal Processing 50(4) (2002)Google Scholar
- 7.Dillen, G., Georis, B., Legat, J.D., Cantineau, O.: Combined Line-Based Architecture for the 5-3 and 9-7 Wavelet Tansform of JPEG 2000. IEEE Transactions on Circuit Syst. Video Technol. 13(9) (2003)Google Scholar