A Fast Instruction Set Evaluation Method for ASIP Designs

  • Angela Yun Zhu
  • Xi Li
  • Laurence T. Yang
  • Jun Yang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4096)


ASIPs are designed specifically for a particular application or a set of applications. Their instruction sets must be carefully tailored to provide high performance as well as to meet non-functional constraints such as silicon area and power consumption. Traditionally, evaluation of different candidate instruction sets is all carried out through simulation. However, the growing design complexity and time-to-market pressure have rendered simulation increasingly infeasible. In this paper, we present an instruction level modeling method that can rapidly evaluates several important aspects of a selected instruction set. Experimental results show that we can prune a large number of candidate instruction sets with the model, accelerate design space exploration and alleviate the pressure on simulation.


Execution Time Basic Block Design Space Exploration Data Flow Graph Instruction Selection 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Angela Yun Zhu
    • 1
  • Xi Li
    • 1
  • Laurence T. Yang
    • 2
  • Jun Yang
    • 1
  1. 1.Department of Computer ScienceUniversity of Science and Technology of ChinaHefei, AnhuiP.R. China
  2. 2.Department of Computer ScienceSt. Francis Xavier UniversityAntigonishCanada

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