Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator
IP lookup process becomes the bottleneck of packet transmission as IP traffic increases. Hardware-based IP lookup is desirable for high-speed router. However, the IP lookup schemes using an index-based table are not efficient due to heavy prefix expansion. In this paper, efficient hardware-based IP lookup schemes using n-way set associative memory and a LPM comparator is proposed. It reduces memory requirements to about 50% or below compared with previous scheme and provides faster updating speed. It also completes an IP routing lookup with two memory accesses.
KeywordsBinary Decision Diagram Ternary Content Addressable Memory Lookup Operation Reduce Memory Requirement Matched Entry
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