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A Silicon Synapse Based on a Charge Transfer Device for Spiking Neural Network Application

  • Yajie Chen
  • Steve Hall
  • Liam McDaid
  • Octavian Buiu
  • Peter Kelly
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3973)

Abstract

We propose a silicon synapse for spiking neural network application. In this endeavor, two major issues are addressed: the structure of the synapse and the associated behavior. This synaptic structure is basically a charge transfer device comprising of two Metal-Oxide-Semiconductor (MOS) capacitors the first of which stores the weight and the second controls its reading. In this work, simulation results prove that the proposed synapse captures the intrinsic dynamics of the biological synapse and exhibits a spike characteristic. The device operates at very low power and offers the potential for scaling to massively parallel third generation hardware neural networks.

Keywords

Inversion Layer Charge Transfer Process Postsynaptic Neuron Output Terminal Synaptic Structure 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Maass, W., Bishop, C.M.: Pulsed Neural Networks. MIT Press, Cambridge (1999)Google Scholar
  2. 2.
    Gerstner, W., Kistler, W.: Spiking Neuron Models: Single Neurons, Populations, Plasticity. Cambridge University Press, Cambridge (2002)MATHGoogle Scholar
  3. 3.
    Maass, W.: Networks of spiking neurons: The Third Generation of Neural Network Models. Electronic Colloquium on Computational Complexity TR96-031, Institute for Theoretical Computer Science, Technische Universitaet Graz, Austria (1996)Google Scholar
  4. 4.
    Thorpe, S., Delorme, A., Van Rullen, R.: Spike-based Strategies for Rapid Processing. Neural Networks 14, 715–725 (2001)CrossRefGoogle Scholar
  5. 5.
    Heemskerk, J.N.H.: Neurocomputers for Brain-Style Processing: Design, Implementation and Application. PhD thesis, Leiden University, The Netherlands (1995)Google Scholar
  6. 6.
    Chicca, E., Badoni, D., Dante, V., et al.: A VLSI Recurrent Network of Integrate-and-Fire Neurons Connected by Plastic Synapses with Long-Term Memory. IEEE Trans. Neural Networks 14(5), 1297–1307 (2003)CrossRefGoogle Scholar
  7. 7.
    Bofill-i-Petit, A., Murray, A.F.: Synchrony Detection and Amplification by Silicon Neurons with STDP Synapses. IEEE Trans. Neural Networks 15(5), 1296–1304 (2004)CrossRefGoogle Scholar
  8. 8.
    Diorio, C., Hasler, P., Minch, B.A., Mead, C.: A Single-Transistor Silicon Synapse. IEEE Trans. Electron Devices 43(11), 1972–1980 (1996)CrossRefGoogle Scholar
  9. 9.
    Diorio, C., Hsu, D., Figueroa, M.: Adaptive CMOS: From Biological Inspiration to Systems-on-a-Chip. Proceedings of the IEEE 90(3), 345–357 (2002)CrossRefGoogle Scholar
  10. 10.
    Strain, R.J., Schryer, N.L.: A Nonlinear Diffusion Analysis of Charge-Coupled-Device Transfer. The Bell System Technical Journal 50, 1721–1740 (1971)Google Scholar
  11. 11.
    Carnes, J.E., Kosonocky, W.F., Ramberg, E.G.: Drift-aiding Fringing Fields in Charge-Coupled Devices. IEEE J. Solid-State Circuits SC-6(5), 322–326 (1971)CrossRefGoogle Scholar
  12. 12.
    Carnes, J.E., Kosonocky, W.F., Ramberg, E.G.: Free Charge Transfer in Charge-Coupled Devices. IEEE Trans. Electron Devices  ED-19(6), 798–808 (1972)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Yajie Chen
    • 1
  • Steve Hall
    • 1
  • Liam McDaid
    • 2
  • Octavian Buiu
    • 1
  • Peter Kelly
    • 2
  1. 1.Department of Electrical Engineering and ElectronicsUniversity of LiverpoolLiverpoolUK
  2. 2.School of Computing and Intelligent SystemsUniversity of UlsterLondonderry, Northern IrelandUK

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