Design and Implementation of FPGA Based High-Performance Intrusion Detection System
As network technology presses forward, Gigabit Ethernet has become the actual standard for large network installations. Therefore, it is necessary to research on security analysis mechanism, which is capable to process high traffic volume over the high-speed network. This paper proposes FPGA based high-performance IDS to detect and respond variant attacks on high-speed links. Most of all, It is possible through the pattern matching function and heuristic analysis function that is processed in FPGA Logic. In other words, we focus on the network intrusion detection mechanism applied in high-speed network.
KeywordsField Programmable Gate Array Intrusion Detection Traffic Volume Incoming Packet High Traffic Volume
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