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International School on Formal Methods for the Design of Computer, Communication and Software Systems

SFM 2006: Formal Methods for Hardware Verification pp 144–175Cite as

Building Efficient Decision Procedures on Top of SAT Solvers

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Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 3965))

Abstract

Many verification problems can be naturally represented as satisfiability problems in some decidable fragments of first order logic. Efficient decision procedures for such problems can be obtained by combining technology for propositional satisfiability and solvers able to deal with the theory component.

We provide a unifying and abstract, theory-independent perspective on the various integration schemas and techniques. Within this framework, we survey, analyze and classify the most effective integration techniques and optimizations for the development of decision procedures. We also discuss the relative benefits and drawbacks of the various techniques, and we analyze the features for SAT solvers and theory-specific solvers which make them more suitable for an integration.

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Authors and Affiliations

  1. ITC-IRST, Povo, Trento, Italy

    Alessandro Cimatti

  2. DIT, Università di Trento, Italy

    Roberto Sebastiani

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  1. Alessandro Cimatti
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  1. Istituto di Scienze e Tecnologie dell’Informazione, Università di Urbino “Carlo Bo”, Italy

    Marco Bernardo

  2. FBK-IRST, Povo, Trento, Italy

    Alessandro Cimatti

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Cimatti, A., Sebastiani, R. (2006). Building Efficient Decision Procedures on Top of SAT Solvers. In: Bernardo, M., Cimatti, A. (eds) Formal Methods for Hardware Verification. SFM 2006. Lecture Notes in Computer Science, vol 3965. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11757283_6

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