Using Distinguishing and UIO Sequences Together in a Checking Sequence

  • M. Cihan Yalcin
  • Husnu Yenigun
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3964)


If a finite state machine M does not have a distinguishing sequence, but has UIO sequences for its states, there are methods to produce a checking sequence for M. However, if M has a distinguishing sequence \(\bar{D}\) , then there are methods that make use of \(\bar{D}\) to construct checking sequences that are much shorter than the ones that would be constructed by using only the UIO sequences for M. The methods to applied when a distinguishing sequence exists, only make use of the distinguishing sequences. In this paper we show that, even if M has a distinguishing sequence \(\bar{D}\), the UIO sequences can still be used together with \(\bar{D}\) to construct shorter checking sequences.


Finite State Machine Outgoing Edge Distinguishing Sequence System Under Test Input Symbol 
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  1. 1.
    Tanenbaum, A.S.: Computer Networks, 3rd edn. Prentice Hall International Editions. Prentice Hall, Englewood Cliffs (1996)MATHGoogle Scholar
  2. 2.
    Gill, A.: Introduction to the Theory of Finite–State Machines. McGraw-Hill, New York (1962)MATHGoogle Scholar
  3. 3.
    Hennie, F.C.: Fault–detecting experiments for sequential circuits. In: Proceedings of Fifth Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, pp. 95–110 (1964)Google Scholar
  4. 4.
    Lee, D., Yannakakis, M.: Principles and methods of testing finite–state machines – a survey. Proceedings of the IEEE 84(8), 1089–1123 (1996)CrossRefGoogle Scholar
  5. 5.
    Sabnani, K., Dahbura, A.: A protocol test generation procedure. Computer Networks 15, 285–297 (1988)Google Scholar
  6. 6.
    Kohavi, Z.: Switching and Finite Automata Theory. McGraw-Hill, New York (1978)MATHGoogle Scholar
  7. 7.
    Lee, D., Yannakakis, M.: Testing finite state machines: state identification and verification. IEEE Trans. Computers 43(3), 306–320 (1994)MathSciNetCrossRefGoogle Scholar
  8. 8.
    Gonenc, G.: A method for the design of fault detection experiments. IEEE Transactions on Computers 19, 551–558 (1970)CrossRefMATHGoogle Scholar
  9. 9.
    Ural, H., Wu, X., Zhang, F.: On minimizing the lengths of checking sequences. IEEE Transactions on Computers 46(1), 93–99 (1997)CrossRefGoogle Scholar
  10. 10.
    Aho, A., Dahbura, A., Lee, D., Uyar, M.: An optimization technique for protocol conformance test generation based on UIO sequences and rural chinese postman tours. IEEE Transactions on Communications 39(11), 1604–1615 (1991)CrossRefGoogle Scholar
  11. 11.
    Chan, W., Vuong, C., Otp, M.: An improved protocol test generation procedure based on UIOS. ACM SIGCOMM Computer Communication Review 19(4), 283–294 (1989)CrossRefGoogle Scholar
  12. 12.
    Tekle, K.T., Ural, H., Yalcin, M.C., Yenigun, H.: Generalizing redundancy elimination in checking sequences. In: Yolum, p., Güngör, T., Gürgen, F., Özturan, C. (eds.) ISCIS 2005. LNCS, vol. 3733, pp. 915–926. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  13. 13.
    Hierons, R.M., Ural, H.: Reduced length checking sequences. IEEE Transactions on Computers 51(9), 1111–1117 (2002)MathSciNetCrossRefGoogle Scholar
  14. 14.
    Hierons, R.M., Ural, H.: Optimizing the length of checking sequences. IEEE Transactions on Computers (2004) (accepted for publication)Google Scholar

Copyright information

© IFIP International Federation for Information Processing 2006

Authors and Affiliations

  • M. Cihan Yalcin
    • 1
  • Husnu Yenigun
    • 1
  1. 1.Faculty of Engineering and Natural SciencesSabanci UniversityTuzla, IstanbulTurkey

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