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Distributed Architecture System for Computer Performance Testing

  • Ezequiel Herruzo
  • Andrés J. Mesones
  • José I. Benavides
  • Oscar Plata
  • Emilo L. Zapata
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3911)

Abstract

This article presents a system which is based on a distributed network architecture. The system defines a ”double” Client-Server structure which permits to incorporate new client systems in real-time using the Internet. We have used this distributed architecture system to develop a tool to measure the computer performance characteristics of several computer architecture systems. The computer performance is tested by a free library called PAPI (Performance API), which allows us to access to internal status registers of several CPU families in several Operating Systems. As this testing has to be done in real CPUs, we have to create a new system to provide this functionality. The structure proposed has only one entry point to the whole system, the Master Server, and several different Architecture Client Servers. We present the network system description and the usage of PAPI for performance testing.

Keywords

Source Code Computer Architecture Target Computer Architecture Client Server Cache Access 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Dongarra, J., London, K., Moore, S., Mucci, P., Terpstra, D.: Using PAPI for Hardware Perfomance Monitoring on Linux Systems. In: Proceedings of the Conference on Linux Clusters: The HPC Revolution, Urbana, Illinois, USA, June 25–27 (2001)Google Scholar
  2. 2.
    Mucci, P.J.: DynaProf (Last modification: November–2003), http://www.cs.utk.edu/~mucci/dynaprof/
  3. 3.
    Hennessy, J.L., Patterson, D.A.: Computer Architecture: A Quantitative Approach, 3rd edn. Morgan Kaufmann, San Francisco (2002)MATHGoogle Scholar
  4. 4.
    HPCToolkit project team (Rice University), HPCToolkit Homepage (Last modification: December–2003) http://hipersoft.cs.rice.edu/hpctoolkit/
  5. 5.
    ICL PAPI Team and contributors, Official PAPI Website (Last modification: May–2004) http://icl.cs.utk.edu/projects/papi
  6. 6.
    London, K., Moore, S., Mucci, P., Seymour, K., Luczak, R.: The PAPI Cross–Platform Interface to Hardware Performance Counters. In: Proceedings of the Department of Defense Users’ Group Conference, Biloxi, Mississippi, USA, July 18–21 (2001)Google Scholar
  7. 7.
    Mesones, A.J., et al.: Medición de eventos del procesador en las prácticas de diseño de procesadores. In: Proceedings of the XIV Jornadas de Paralelismo, Leganés, Spain, September 15–17, pp. 277–280 (2003) ISBN: 80-89315-34-5Google Scholar
  8. 8.
    Stallings, W.: Computer Organization and Architecture, 6th edn. Prentice Hall, Englewood Cliffs (2002)MATHGoogle Scholar
  9. 9.
    SvPablo project team (University of Illinois at Urbana–Champaign), SvPablo (Last mofication: October–2003) http://www-pablo.cs.uiuc.edu/Project/SVPablo/SvPabloOverview.htm
  10. 10.
    Nesheiwat, J., Szymanski, B.K.: Instrumentation Database System for Performance Analysis of Parallel Scientific Applications. Parallel Computing 28(10), 1409–1449 (2002)CrossRefMATHGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Ezequiel Herruzo
    • 1
  • Andrés J. Mesones
    • 1
  • José I. Benavides
    • 1
  • Oscar Plata
    • 2
  • Emilo L. Zapata
    • 2
  1. 1.Dept. ElectronicsUniversity of CórdobaSpain
  2. 2.Dept. of Computer ArchitectureUniversity of MálagaSpain

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