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Task Scheduling for Look–Ahead Reconfigurable Systems in Presence of Conditional Branches

  • Eryk Laskowski
  • Marek Tudruj
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3911)

Abstract

A new program structuring algorithm for dynamically look–ahead reconfigurable multi–processor systems is presented in the paper. The presented algorithm uses a new kind of graph representation of parallel programs with conditional branches (Branching Task Graph, BTG). The BTG captures the data–flow and control–flow properties of parallel programs. It extends the scope of parallel programs optimized for execution in look–ahead reconfigurable systems beyond static DAG graphs. The new program graph structuring algorithm for BTG graphs is based on a two–phase approach. It consists of a new list task scheduling heuristics, which incorporates branch optimization techniques such as detection of mutually–exclusive subgraphs and scheduling of most–often–used paths based on branch probabilities. In the second phase, program partitioning into sections executed with the look–ahead created connections is done, based on the modified iterative clustering heuristics.

Keywords

Parallel Program Task Schedule Program Execution Program Graph List Schedule 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Hwang, J.-J., et al.: Scheduling Precedence Graphs in Systems with Interprocessor Communication Times. Siam J. Comput. 18(2) (1989)Google Scholar
  2. 2.
    Tudruj, M.: Look–Ahead Dynamic Reconfiguration of Link Connections in Multi–Processor Architectures. In: Parallel Computing 1995, Gent, September, pp. 539–546 (1995)Google Scholar
  3. 3.
    Laskowski, E., Tudruj, M.: A Testbed for Parallel Program Execution with Dynamic Look–Ahead Inter–Processor Connections. In: Proc. of the PPAM 1999 (September 1999)Google Scholar
  4. 4.
    Laskowski, E.: Program Structuring Algorithms for Dynamically Reconfigurable Parallel Systems Based on Redundant Connection Switches. In: Proc. of the 3rd Int. Symposium on Parallel and Distributed Computing, Cork, Ireland, pp. 248–255 (2004)Google Scholar
  5. 5.
    Wu, D., Al–Hashimi, B., Eles, P.: Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems. IEEE Proceedings – Computers and Digital Techniques 150(5), 303–312 (2003)CrossRefGoogle Scholar
  6. 6.
    Xie, Y., Wolf, W.: Allocation and scheduling of conditional task graph in hardware/software co–synthesis. In: DATE 2001, pp. 620–625 (2001)Google Scholar
  7. 7.
    Murphy, C., Wang, X.: Most Often Used Path Scheduling Algorith. In: Proc. of the 5th World Multi–Conference on Systemics, Cybernetics and Informatics (SCI 2001), Orlando, USA, July 22-25, 2001, vol. XII, pp. 289–295 (2001)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Eryk Laskowski
    • 1
  • Marek Tudruj
    • 1
    • 2
  1. 1.Institute of Computer SciencePolish Academy of SciencesWarsawPoland
  2. 2.Polish-Japanese Institute of Information TechnologyWarsawPoland

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