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A Low-Footprint Java-to-Native Compilation Scheme Using Formal Methods

  • Alexandre Courbot
  • Mariela Pavlova
  • Gilles Grimaud
  • Jean-Jacques Vandewalle
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3928)

Abstract

Ahead-of-Time and Just-in-Time compilation are common ways to improve runtime performances of restrained systems like Java Card by turning critical Java methods into native code. However, native code is much bigger than Java bytecode, which severely limits or even forbids these practices for devices with memory constraints.

In this paper, we describe and evaluate a method for reducing natively-compiled code by suppressing runtime exception check sites, which are emitted when compiling bytecodes that may potentially throw runtime exceptions. This is made possible by completing the Java program with JML annotations, and using a theorem prover in order to formally prove that the compiled methods never throw runtime exceptions. Runtime exception check sites can then safely be removed from the generated native code, as it is proved they will never be entered.

We have experimented our approach on several card-range and embedded Java applications, and were able to remove almost all the exception check sites. Results show memory footprints for native code that are up to 70% smaller than the non-optimized version, and sometimes as low than 115% the size of the Java bytecode when compiled for ARM thumb.

Keywords

Virtual Machine Smart Card Proof Obligation Java Virtual Machine Memory Footprint 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© IFIP International Federation for Information Processing 2006

Authors and Affiliations

  • Alexandre Courbot
    • 1
  • Mariela Pavlova
    • 2
  • Gilles Grimaud
    • 1
  • Jean-Jacques Vandewalle
    • 3
  1. 1.POPS Research GroupIRCICA/LIFL, Univ. Lille 1, INRIA futursFrance
  2. 2.Everest Research GroupINRIA Sophia-AntipolisFrance
  3. 3.Gemplus Systems Research LabsLa CiotatFrance

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